Exploring the JTAG interface of the 7-series Xilinx FPGA and Zener diode protection When I was selecting the 7-series Xilinx FPGA for a new PCB design, I was unsure about the design of the JTAG interface. To find a reliable reference, I reviewed several schematic diagrams of Xilinx evaluation boards, among which the schematic of … Read more
Click to follow for more exciting content!! 01PARTIntroduction This article provides a brief explanation of the usage of BSCAN based on the Spartan-6 and Kintex-7 series of FPGAs, using the K735 development board and LS-Extended development board; the software used includes riscv-openocd and riscv-gdb (included in the toolchain). Principle Explanation02PART BSCAN stands for JTAG-boundary-scan, which … Read more
Follow and star our official account for exciting content Source: https://blog.csdn.net/weixin_39847099/article/details/111802365Organized by: ZYNQ | Xiao Mo The JTAG Configuration Process of Zynq When first learning Zynq, I believe everyone, like me, follows the usual practice of opening the Vivado software, setting up the programmable logic (PL) part of Zynq, exporting the hardware deployment, then opening … Read more
Xilinx‘s JTAG cable can directly program SPI/BPI. Many users who are not familiar with the Xilinx development environment may have questions when encountering this programming mode for the first time. How does the FPGA bridge between JTAG and Flash? Is there a dedicated circuit inside the FPGA to achieve this function? Actually, no. The FPGA … Read more
Here are the results from the past two days, implementing FPGA fixed-point decimal calculation in Verilog. There will be N parts, including addition, multiplication, division, square root, square, etc. Currently, addition and multiplication have been debugged, while division, square root, and square are not yet completed. Due to time constraints, this blog post will directly … Read more
The previous article introduced GTX transmitter, and this article will introduce GTX RX receiver. The structure of the GTX RX receiver is similar to that of the TX transmitter, with the data flow direction reversed. However, there are some differences from the transmitter. The structure diagram of the GTX RX receiver is shown in Figure … Read more
▲ For more exciting content, please click on the blue text above to follow us! DSP can be traced back to the dawn of the digital age, possibly even earlier. If the construction of the first digital computer ENIAC in 1946 marked the beginning of the digital age, then DSP appeared two years later. In … Read more
Xilinx 7 Series FPGA Built-in ADC The entire Xilinx 7 series FPGA is equipped with an ADC, referred to as XADC. This XADC consists of two internal 1 Mbps ADCs that can convert analog signals into digital signals for internal FPGA use. The XADC can directly obtain the chip junction temperature and several power supply … Read more
Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the largest and best FPGA engineering community in China. With the continuous development of FPGAs, the number of built-in PCIE hard cores is increasing. This article introduces how to allocate the corresponding hardware pins using ZU11EG … Read more
Introduction Xilinx AI SDK is a set of high-level libraries for the Deep Neural Network Development Kit (DNNDK) and Deep Learning Processing Unit (DPU). By integrating a large number of efficient and high-quality neural networks, Xilinx AI SDK provides an easy-to-use unified interface. This simplifies the use of deep learning neural networks, even for users … Read more