Title: Briefly describe the ASIC design process and list the tools used in each part. Basic ASIC Development Process Chip Architecture, considering chip definition, process, and packaging. RTL Design, described using Verilog, System Verilog, or VHDL. Functional Simulation, simulation under ideal conditions. Verification, using UVM verification methodology and FPGA prototype verification. Synthesis, logic synthesis, mapping … Read more
I have been writing RTL for over a decade and have encountered various engineering coding standards, constraints, and suggestions. Therefore, I am summarizing my experiences at this stage. The Verilog/SV coding suggestions and some engineering requirements mentioned and discussed in this series are based on what I have encountered and understood during my work process. … Read more
1. Concept Composition of Power Consumption: Three main sources of power consumption: surge, static power, and dynamic power; Surge Current: Refers to the maximum instantaneous input current generated when the device is powered on, known as the inrush current; The surge current is device-dependent; Surge power is not our primary concern, so it is only … Read more
Low Power Design Techniques: Data Gating (Data Gating) and Operand Isolation (Operand Isolation) Previously, we discussed Clock Gating (Clock Gating), which is a well-known low power design technique. It can be easily applied during the logic synthesis stage without requiring changes to the RTL, making it one of the more straightforward methods for achieving low … Read more
Power consumption is a critical performance metric in chips, sometimes even determining the success or failure of a chip. As is well known, the recent “Snapdragon Fire Dragon” incident significantly impacted the market share of this chip. For industrial-grade and automotive-grade chips, the impact of power consumption is not very apparent. However, for consumer-grade chips … Read more
RTL is an essential part of IC system design. How important is RTL design? Essentially, the logical functions of IC systems are implemented in RTL, so many IC projects are closely tied to RTL design. Today, let’s discuss how to excel in RTL design. Generally, once the preparatory work and product requirements are determined, engineers … Read more
Source: Content fromhttp://www.cnblogs.com/IClearner/ , Author: IC_learner, Thank you. This section mainly introduces the use of gated clocks for low-power design. (4) Gated Clock The gated clock was briefly described in my first blog; here I will provide a more detailed description. We will mainly learn what gated clock circuits are, when to use gated clocks, … Read more
1. Low Power Design With the promotion of handheld portable devices, the issue of low power design has become increasingly important. Lower chip power consumption means longer usage time for portable devices, increased lifespan of chips due to reduced power consumption, better control of heat dissipation, and the ability to make devices smaller, among other … Read more
Source: Content from Mo Shang Feng Qi Lu Kan IC, thank you.. With the support of various parties, integrated circuits have become a hot topic of the era, with numerous articles discussing the complexity and difficulties of chip design. The old donkey plans to review the chip design process from the perspective of EDA usage. … Read more
First, what is XPM? Many people may not have heard of or used it. Its full name is Xilinx Parameterized Macros, which are Xilinx’s parameterized macros, similar to the instantiation and usage of primitives. You can check which XPMs can be instantiated in Vivado under Tools->Language Templates. From the above image, it can be seen … Read more