Introduction to Low-Power Design in Digital ICs (Part 5)

Introduction to Low-Power Design in Digital ICs (Part 5)

Source: Content fromhttp://www.cnblogs.com/IClearner/ , Author: IC_learner, Thank you. This section mainly introduces the use of gated clocks for low-power design. (4) Gated Clock The gated clock was briefly described in my first blog; here I will provide a more detailed description. We will mainly learn what gated clock circuits are, when to use gated clocks, … Read more

Summary of Low Power Design in ASIC Design + Book Recommendations

Summary of Low Power Design in ASIC Design + Book Recommendations

1. Low Power Design With the promotion of handheld portable devices, the issue of low power design has become increasingly important. Lower chip power consumption means longer usage time for portable devices, increased lifespan of chips due to reduced power consumption, better control of heat dissipation, and the ability to make devices smaller, among other … Read more

Comprehensive Explanation of Chip Design Process

Comprehensive Explanation of Chip Design Process

Source: Content from Mo Shang Feng Qi Lu Kan IC, thank you.. With the support of various parties, integrated circuits have become a hot topic of the era, with numerous articles discussing the complexity and difficulties of chip design. The old donkey plans to review the chip design process from the perspective of EDA usage. … Read more

Four Methods to Invoke FPGA Memory Units

Four Methods to Invoke FPGA Memory Units

First, what is XPM? Many people may not have heard of or used it. Its full name is Xilinx Parameterized Macros, which are Xilinx’s parameterized macros, similar to the instantiation and usage of primitives. You can check which XPMs can be instantiated in Vivado under Tools->Language Templates.  From the above image, it can be seen … Read more

Gracefully Using ILA for FPGA Hardware Debugging

Gracefully Using ILA for FPGA Hardware Debugging

Vivado (Vitis) Version: 2020.2 FPGA Development Board: Microphase Z7-Lite 7020 Development Board FPGA Design Debugging Process FPGA development is an iterative process, and the general FPGA design process typically includes the following steps: Hardware architecture and algorithm verification: what modules are needed to implement the required functionality, how modules communicate and connect with each other; … Read more

Low Power Design for SoC Systems (Part 1) Introduction

Low Power Design for SoC Systems (Part 1) Introduction

Low power design is an indispensable topic in modern chip design. After all, no one wants their phone or other electronic devices to require frequent charging. Especially for small products, many people cannot accept the need for an external power supply to function normally. Since the inception of electronic devices, there has been a continuous … Read more

Low-Power Design in Digital ICs

Low-Power Design in Digital ICs

EETOP focuses on chips and microelectronics. Click on the blue text above to follow us. This article is sourced from Zhihu, authorized by the author, thank you. Author: Wenge Link:https://zhuanlan.zhihu.com/p/163635969 Nowadays, portable devices have become increasingly prevalent in people’s daily lives. Mobile phones, iPads, and computers have become necessities, even my grandmother has started using … Read more