At least it won’t let those AI accelerators be designed by Arm. After a tough 2023, the situation for RISC-V chip design company SiFive may be improving, as the company expects strong revenue growth driven by AI in 2024. Documents obtained by Bloomberg this week indicate that the second-generation processors designed for AI servers will … Read more
This article is sourced from the SiFive Blog, translated and reposted to convey more information related to RISC-V, copyright belongs to the original author. There Is No Best, Only Better – SiFive’s Latest Core IP Product Line Released We are very pleased to announce a comprehensive update to the SiFive RISC-V IP portfolio in the … Read more
At Hot Chips 2023, SiFive introduced the new high-performance P870 RISC-V core and its automotive equivalent, the P870-A core, discussing the overall state of RISC-V, its previous generation cores, and future development directions. The P870 and P870-A RISC-V cores are new additions to SiFive’s Performance series, compatible with the RISC-V RVA23 profile, and are successors … Read more
I have a black leather notebook that I’ve been using since 2001, with the National Semiconductor logo on its cover. It holds sentimental value for me. Firstly, it reminds me of the breakfast I had with attendees at a National Semiconductor executive event in Laguna Niguel, California, on September 11, 2001. That morning, we were … Read more
SiFive’s Best Processor Portfolio We are excited to announce that the SiFive 20G1 version has undergone a comprehensive update and upgrade to its RISC-V IP portfolio. The release of version 20G1 brings enhancements and new features to the SiFive Core IP, which is the most widely used RISC-V IP portfolio in the industry. This portfolio … Read more
Access, Inspect, and Control The term “debug” has a legendary history. According to various sources, the word debug was coined in 1945 by computer pioneer and U.S. Navy Rear Admiral Grace Hopper when she removed a moth from the Harvard Mark II computer. The use of the word bug can also be traced back to … Read more
★ Click the blue text above to follow us with one click ★ With the continuous improvement of embedded processors’ capabilities, ultra-miniaturized hardware accelerators are being introduced, and the emergence of original and commercial development environments and tools, embedded artificial intelligence/machine learning (AI/ML) technologies have rapidly developed in recent years. At the same time, because … Read more
With the official release of the first RISC-V Chinese book “Hands-On CPU Design – RISC-V Processor Edition” more and more enthusiasts are starting to use the open-source Hummingbird E203 RISC-V core, and many beginners have left messages asking about the use of the RISC-V toolchain. To facilitate beginners in quickly learning RISC-V CPU design and … Read more
Today, I will teach you how to run a RISC-V Linux on the QEMU emulator. A RISC-V Linux includes: opensbi linux root filesystem 1. Download RISC-V Toolchain Downloading the toolchain source code and compiling it can lead to incorrect options, so we will use the precompiled toolchain instead. Website: https://toolchains.bootlin.com This site provides some precompiled … Read more
To gain a deeper understanding of the Linux implementation of the RISC-V 64 architecture, we have specially adapted the Buildroot 2021 open-source build tool, making it easier for everyone to delve into various parts of the Neza D1, such as the boot process, OpenSBI, U-Boot, kernel, root filesystem, etc. Using Buildroot to compile the build … Read more