Implementing Neural Networks on a 10-Cent RISC-V MCU Without a Multiplier

For some time now, I have been contemplating setting up an environment to implement algorithms based on neural networks on a smaller (8-pin) microcontroller. After reviewing existing solutions, I found that none truly satisfied me. An obvious problem is that flexibility often comes at the cost of overhead. As usual, for a truly optimized solution, you have to roll it out yourself.

Github link:

https://github.com/cpldcpu/BitNetMCU

Implementing Neural Networks on a 10-Cent RISC-V MCU Without a Multiplier

It's always easier to face a

Heterogeneous Quad-Core Embedded Processor RV32M1 Series – RI5CY Core Hardware Abstraction Layer Project

Luo Jia Submission: Heterogeneous Quad-Core Embedded Processor RV32M1 Series - RI5CY Core Hardware Abstraction Layer Project: https://github.com/rv32m1-rust/rv32m1_ri5cy-hal The RV32M1 processor has four cores with different instruction sets, including two different ARM cores and different RISC-V cores, allowing for more adaptable and flexible application frameworks. Each core should be supported by different hardware abstraction layer libraries; here our project provides support for the RI5CY core, with GPIO read/write and configuration already completed. Welcome to check it out.

The New Combination of RISC-V and FPGA — BeagleV-Fire

Recently discovered an interesting development board that is based on RISC-V and FPGA.

This form is my first encounter.

It is the

BeagleV®-Fire

The New Combination of RISC-V and FPGA — BeagleV-Fire

BeagleV®-Fire adopts Microchip's PolarFire® FCVG484E 5-core RISC-V system-on-chip and FPGA architecture.

It has 4 64-bit RV64GC application cores and 1 64-bit RV64IMAC monitor/boot core, with a performance of 3.125 CoreMarks/MHz and 1.714 DMIPS/MHz.

The FPGA part has 23,000 logic elements (4-input LUT + DFF), 68 math blocks (18x18 MACC), and four 12.7Gbps SerDes

The Turbulent Future of Arm: Can RISC-V Take on the Challenge?

According to reports from Electronic Enthusiasts Network (by Zhou Kaiyang), there have been numerous reports claiming that Nvidia's exclusive acquisition negotiations for Arm have entered the final stages, with related parties stating that the transaction could be completed as early as late summer this year. As an architecture that supplies billions of chips to the market each year, this news has raised concerns about Arm's position, and its open-source competitor RISC-V has begun to emerge in people's minds.

As the dominant

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