XILINX set_property BITSTREAM.CONFIG.CONFIGRATE

Cause

In a new XILINX XCKU040 FPGA design, SPI supports X8 mode, and the BIT generation constraints are as follows:

# the hardware support spix8, will boot faster from flash
#set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
#set_property CONFIG_MODE SPIx8 [current_design] 
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property CONFIG_MODE SPIx4 [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]

Here, set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design] is actually unsupported, and it will cause the device to fail to start, resulting in abnormal BIT loading.

Modification

Different chips correspond to different supported CONFIGRATE values, which need to be referenced in the manual UG908 to set the correct boot speed.

The 7 series is as follows:

XILINX set_property BITSTREAM.CONFIG.CONFIGRATE

The KU series is as follows:

XILINX set_property BITSTREAM.CONFIG.CONFIGRATE

The KU+ series is as follows:

XILINX set_property BITSTREAM.CONFIG.CONFIGRATE

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