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DSP can be traced back to the dawn of the digital age, possibly even earlier. If the construction of the first digital computer ENIAC in 1946 marked the beginning of the digital age, then DSP appeared two years later.
In 1998, IEEE published a monograph titled “Fifty Years of Signal Processing: The IEEE Signal Processing Society and its Technologies 1948-1998,” referring to the year 1948 as the annus mirabilis of DSP. In the same year, Claude Shannon of Bell Labs published the landmark paper “A Mathematical Theory of Communication,” which established the relationship between achievable bit rates, channel bandwidth, and signal-to-noise ratio.
That same year, Shannon, Bernard M. Oliver, and John R. Pierce from Bell Labs published “The Philosophy of PCM,” documenting the practicality of pulse code modulation and branding PCM with a mark of practicality; this theory was first envisioned by Alec Reeves in 1937. (Bernard Oliver, perhaps better known as Barney Oliver, was a notable figure who founded HP Labs in 1966, but that’s a whole other story.) Shannon, Oliver, and Pierce were documenting some concepts of PCM used to build the top-secret SIGSALY secure voice system, a massive contraption the size of a room, weighing 50 tons, that encoded and encrypted the most important voice communications for the Allies during World War II.
Coincidentally, Bell Labs announced the development of the transistor on June 30, 1948, the same year it published two landmark papers that sparked the DSP revolution. (The actual development of the transistor occurred the year prior.) We needed transistors and solid-state electronics to transform the concepts in Shannon, Oliver, and Pierce’s papers into affordable practical technology that would change the world of electronics, so 1948 was indeed the miracle year for DSP.
For a long time after 1948, there were not many changes in DSP technology. Digital electronics were too new for DSP to be practical, at least not for real-time signal processing. During this period, many DSPs involved manually inputting digits into Friedan and Marchant mechanical calculators, which was highly impractical for audio or video communications. The nascent world of DSP was waiting for key developments. In fact, there were several key developments.
This is the story of how DSP and single-chip DSP took over the entire world of signal processing. It resembles the history of digital electronics itself, spanning the evolution of integrated circuits (ICs), microprocessors, DSPs, and FPGAs. In our view, FPGAs ultimately triumphed.
Some Unstable Steps
The first key development necessary to make DSP practical was the invention of the IC. Almost simultaneously, Jack Kilby of Texas Instruments (TI) and Robert Noyce of Fairchild Semiconductor envisioned two distinctly different approaches to building the first integrated circuit. In February 1959, TI’s Kilby filed the first patent. Kilby envisioned constructing multiple electronic components on a silicon rod and then connecting them together using small gold bond wires. Before filing the patent, he had actually built such a circuit in 1958. However, Kilby’s intricate manual assembly process was completely impractical and unlikely to scale to commercial mass production.Noyce’s idea, proposed in early 1959, was to use photolithography; Fairchild Semiconductor had already used this technique to manufacture silicon transistors, imaging multiple electronic components onto a single chip and then interconnecting them with a metal interconnect layer using the same photolithography technique. He left the details to Jean Hoerni, who developed the planar process that has been used for IC manufacturing ever since. Noyce and Fairchild were later than Kilby, but they still filed patents on these ideas in 1959.The practical manufacturing methods for ICs were just the first of many key developments required. Early digital ICs were too primitive and contained too few transistors to be seriously considered for practical DSP. That’s because DSP involves a very esoteric concept—mathematics. Specifically, you need two key mathematical operators—multiplication and addition—and you need to use a lot of these operations to perform DSP. Some of us became digital engineers so we could forget about math.DSP engineering is not like that. When using DSP, there’s no escape from mathematical operations.While the electronics world was waiting for sufficient semiconductor technological advances to make DSP a practical technology, the rest of the world was impatient. The Bell System needed to develop methods to fill more voice capacity through its vast line installations, and PCM was clearly the first step. Additionally, the military’s post-war use of radar and sonar was booming, and DSP was evidently the way to improve and enhance the capabilities of these systems. Communication satellites were initially envisioned in a paper written by Arthur C. Clarke in 1945, which would require digital communication to address some dreadful signal-to-noise ratio issues related to sending signals to and receiving signals from Earth orbit.The world was ready, but the ICs were not.While the DSP world waited for semiconductor technology to catch up, signal processing theorists were not idle. Bell Labs’ Binshu Atal and Manfred Schroeder developed Adaptive Predictive Coding (APC) in 1967, making it possible to obtain moderate quality audio from a 4.8kbps bitstream.Then, Atal developed Linear Predictive Coding (LPC) for speech compression. Almost simultaneously, Fumitada Imakura of Nagoya University and Shuzo Saito of NTT developed Partial Correlation (PARCOR) coding, a very similar algorithm. These new speech processing algorithms naturally required more computation—more multiplications and additions—making it increasingly clear that specialized ICs were needed to make DSP practical and cost-effective.However, speech running through bandwidth-limited telephone channels was not the only place where DSP signals were needed. Radar and sonar signal processing algorithms also required it. Television signals, which truly occupy bandwidth, needed it. As long as the technology was practical, every signal generated and received could benefit from DSP. If only it didn’t require filling racks and circuit board racks with the medium-sized ICs sold by TI and many other vendors in the 1960s.The first commercial microprocessor, Intel’s 4004, launched in 1971, was the first hint of things to come. The Intel 4004 microprocessor could certainly perform multiplications and additions, but it could only add four bits at a time, and multiplication was a multi-step instruction sequence. Silicon was willing, but the ALU and bit width were weak.
The First DSP Chip Didn’t Quite Cut It
In 1976, TRW managed to create and sell a 16×16 bit single-chip digital multiplier—MPY016H—manufactured using 1-micron bipolar technology. The TRW MPY016H could multiply two 16-bit numbers to produce a 32-bit result in 45 nanoseconds (dash-1 part was 40 nanoseconds), but it could not add. You needed additional ICs to connect the accumulator to the multiplier. Moreover, you could not extract the 32-bit result in a single operation. You split the result into two parts through the IC’s 16-bit output port. So this product was really not a DSP. It was just a part of DSP. Additionally, with two 16-bit input ports and one 16-bit output port, the TRW MPY016H had to be packaged in a 64-pin wide DIP. It operated at 5V, but it nearly required an amplifier to start. At 5 watts, it also needed some cooling.In 1978, AMI launched the S2811 signal processing peripheral, which was a DSP with a 12-bit hardware multiplier, a 16-bit ALU, and a 16-bit output, but it was not designed as a single-chip DSP. AMI designed the S2811 as a memory-mapped peripheral for the 8-bit 6800 microprocessor, and AMI also manufactured the product as an alternative source for the founding semiconductor manufacturer of that microprocessor, Motorola. The version of the 6800 microprocessor by AMI was called S6800.The 6800 microprocessor accessed the AMI S2811 through a small and three larger on-chip multi-port RAM configurations. Although the AMI S2811 was released in 1978, it was based on a difficult-to-manufacture VMOS technology, delaying its arrival by several years. By then, several single-chip DSPs had already been released; with the introduction of Intel 8088, Zilog Z8000, and Motorola 68000, the 16-bit microprocessor era had begun; the market for 6800 microprocessor peripherals began to shrink rapidly. That made the outdated AMI S2811 never achieve commercial success.In the same year that AMI launched the S2811 signal processing peripheral, TI introduced a DSP-based toy to consumers, the battery-powered “Speak & Spell,” which used LPC as its core speech encoding technology. The Speak & Spell toy utilized the TI TMC0280 speech synthesizer chip, which implemented Binshu Atal’s LPC algorithm in hardware. The TMC0280 was essentially a dedicated DSP.Although the semiconductor technology of the time limited the vocabulary of TI Speak & Spell to 165 words, this sparse vocabulary was a significant technological leap for a children’s toy, even with a retail price of (at the time) $50. While the TI TMC0280 was a specialized dedicated speech DSP, its low cost and battery running time capabilities paved the way for the upcoming DSP ICs.In February 1979, Intel attempted to express “Yes, we can” by announcing the Intel 2920 “Analog Signal Processor.” This strange integrated DSP featured a 9-bit ADC (8 bits plus sign) with a four-input analog multiplexer at the front end, a 9-bit DAC with an 8-channel analog sample-and-hold circuit and analog multiplexer at the back end, and a digital ALU in the middle capable of performing addition, subtraction, and absolute value operations to produce a 25-bit result. The lack of multiplication and division instructions forced the use of multi-instruction sequences to perform the necessary DSP mathematical operations. Each multiplication operation required 12 instructions, while division required 14 instructions. Each Intel 2920 instruction took about half a microsecond to execute,the Intel 2920 was designed for signal filtering applications, but its slow execution speed, limited data path, unique instruction set, lack of hardware multipliers, limited analog input and output voltage range, and other serious limitations doomed the IC to commercial failure.Thus, although few remember the Intel 2920, it also heralded the arrival of DSP.As the 1970s drew to a close, the world was clearly ready, even eager, for a true single-chip DSP. Thanks to theorists, algorithms had been developed and were ready. Many signal processing applications were begging for powerful DSP chips. All that remained was to develop chip designs and process technologies capable of supporting these demands. AMI, AT&T, Intel, Panasonic, Motorola, NEC, TI, ADI, and others were all working frantically on this issue. The explosive growth of DSP chips was imminent.After the miracle year of DSP in 1948, it would take another three decades for actual, practical DSP chips to appear. Fragmented components like TRW’s MPY016H hardware multiplier and TI’s TMC0280 LPC speech chip were teased—true integrated DSPs were on the horizon—but it wasn’t until the 1980s that semiconductor technology advanced enough to make programmable DSP chips practical. The number of single-chip DSPs exploded in the 1980s and 1990s.Then, 20 years later, the era of single-chip DSP came to an abrupt halt.Wally Rhines, who worked for Texas Instruments (TI) in the 1970s, was very eager to leave TI’s factory in Lubbock, Texas. When he had the opportunity to manage TI’s microprocessor business in Houston, he chose that position because he found Houston a more attractive place to live. Moreover, no one wanted the job. TI’s 16-bit 9900 microprocessor was struggling due to its uncompetitive 16-bit address space. Failing to gain a foothold in the general-purpose microprocessor market, Rhines created a four-pronged strategy for the newly adopted microprocessor team at TI in Houston. The four aspects of TI’s bifurcation strategy were:
- TMS320 DSP series
- TMS340 series graphics processors
- TMS360 large capacity storage processors (which soon went nowhere)
- Token-ring LAN processor TMS380 for IBM network architecture
Among these, the TMS320 DSP series became the rock star of the strategy. As Rhines mentioned in an interview, “…it taught us a lesson: desperation is the mother of innovation.” After several years of incubation, TI launched the first batch of TMS320 DSPs in April 1982. However, for such new technology, merely building chips was not enough. For years, TI had been promoting DSP and supporting its new DSP with software development tools and training before seeing these components achieve significant success. According to Rhines, it took TI another five to six years to start seeing some real revenue from these products.
TI Was Not the First
However, TI’s DSP chips were certainly not the first on the market. Intel had launched the ill-fated 2920 analog signal processor as early as 1979, but another of the company’s products, the 16-bit 8086 microprocessor, became the core of the IBM PC, overshadowed by its 8-bit external data bus “brother”—the 8088 microprocessor. The Intel 2920 faded from sight, likely because all of Intel’s attention was drawn to the general-purpose microprocessor market.TI was just one of several semiconductor companies preparing to enter the DSP field in the early 1980s. According to Will Strauss, president of Forward Concepts and an analyst focused on DSP for decades, the first “real” single-chip DSPs with hardware multipliers/accumulators were the AT&T DSP-1—developed by Bell Labs and showcased at an internal AT&T meeting in May 1979. In February 1980 at the IEEE Solid-State Circuits Conference, NEC introduced the NEC µPD7720. AT&T integrated the DSP-1 into its groundbreaking telephone network 5ESS electronic switching system. Subsequently, AT&T continued to develop several generations of devices, including DSP16 and DSP32 (the first floating-point DSP chip). However, the AT&T DSP-1 and its successors remained owned by the Bell System,while the NEC µPD7720 featured a 16×16 bit multiplier and two 16-bit accumulators, making it a true single-chip DSP. Although NEC announced the device in early 1980, it did not hit the market until 1981 with the required development tools. Strauss noted that the NEC µPD7720 achieved the greatest success in Japan, as did many programmable ICs from Japan, and this chip was also popular in Europe.Starting with the DSP56000 processor launched in 1986, Motorola Semiconductor became another early competitor vying for dominance in the DSP chip market in the 1980s. The Motorola DSP56000 featured a 24-bit hardware multiplier and two 48-bit accumulators that could be extended by 8 bits using a pair of extended registers. This large data word capability allowed the Motorola DSP56000 to handle high-precision audio, making it quickly popular among high-end audio system developers.
Duels in the 1990s
Major players in the DSP field competed for dominance in the 1980s and 1990s. They produced multiple generations of increasingly powerful devices with multiple hardware multipliers, floating-point hardware multipliers, and larger on-chip memory capacities. By the late 1990s, TI, Motorola, and Philips had developed DSP monster processors with VLIW architecture, multiple multipliers/accumulators, and additional functional units for special operations (like bit-mixing).When competitive chip technologies suddenly emerged and blindsided DSP vendors, the development of larger and more powerful standalone DSP chips abruptly ceased. Just as the Chicxulub asteroid wiped out the dinosaurs 66 million years ago, leaving a thin layer of iridium as its calling card, FPGAs crashed the single-chip DSP party at the turn of the millennium.A fundamental principle of DSP, combined with some history, explains how and why FPGAs rapidly eliminated single-chip DSP as a vibrant category of processors.First, the principle: DSP is all about mathematics, and DSP performance relies on the ability to execute a large number of multiplications/additions (MAC) very quickly. That’s why the latest single-chip DSPs feature multiple hardware multiplier/accumulator units and additional functional units to route non-MAC operations from the multiplier/accumulator. The more MAC units a device has, the faster it can perform DSP operations, as most DSP algorithms contain many inherent parallelisms that can be leveraged by multiple MAC units.Now, looking back at history: FPGAs debuted in 1984 when Xilinx introduced the XC2064. The first FPGAs were merely a bunch of very slow gates (actually, programmable logic blocks based on lookup tables) surrounded by a lot of programmable interconnects. This early architectural design allowed FPGAs to swallow the logic of many TTL chips in circuit board designs. However, the earliest FPGAs were slow. They posed no threat to the processors of the time, and certainly did not impact the DSP field. Not at first, anyway.
The FPGA Expansion Era
Since FPGAs were designed to ride the Moore’s Law wave from the start, by 2000, FPGAs had grown from the original Xilinx XC2064’s meager 64 logic blocks to tens of thousands of logic blocks. In an article titled “Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology,” former Xilinx researcher Steve Trimberger referred to the growth period of FPGAs in the 1990s as the “Expansion Era.” During this era, FPGAs evolved along the Moore’s Law curve, becoming larger by integrating more and more programmable logic blocks. However, compared to ASICs, circuits built in FPGAs using programmable logic were relatively slow, inefficient in silicon usage, and more expensive. Consequently, MACs built with programmable logic were relatively slow and costly.Later, during Trimberger’s “Accumulation Era”—when FPGAs added hardened MAC blocks—FPGAs suddenly became significant competitors to DSPs. FPGAs did not just add one or two hardware multipliers; they added dozens, thanks to the generous support of Moore’s Law.The first series of FPGAs to integrate fast hardware multipliers was the Xilinx Virtex-II FPGA series. In July 2001, Xilinx announced it had shipped Virtex-II XC2V6000 FPGAs worth $1 million, each with 144 hardened on-chip 18×18 bit multipliers. Therefore, the performance of the first FPGAs with hardware multipliers surpassed that of every single-chip DSP that existed at the time and likely exceeded all that were yet to come.Altera quickly followed Xilinx and launched its first generation of Stratix FPGAs with 36×36 bit hardware multipliers in 2002. The hardware multipliers in Stratix FPGAs could be split into 18×18 bit or 9×9 bit multipliers to allow for more MAC operations, albeit with lower bit resolution. In the early years of this century, Xilinx and Altera FPGA series far outnumbered single-chip DSPs in the number of synchronous MAC operations they could perform.
Today’s FPGAs Have Many MACs
Today, some of the smallest FPGAs from Intel (which acquired Altera in 2015) and Xilinx offer a plethora of hardware multipliers. Members of the older but still available Intel Cyclone IV FPGA series contain 80 to 532 embedded 18×18 bit multipliers. Similarly, members of the older Xilinx Spartan 6 FPGA series include devices with 8 to 180 DSP48A1 slices, while newer members of the Xilinx Artix FPGA series contain up to 740 DSP48E1 slices. Each DSP48A1 slice contains an 18×18 bit multiplier and a 48-bit accumulator, while each DSP48E1 slice contains a 25×18 bit multiplier and a 48-bit accumulator. The bit counts in the DSP48 slice multipliers seem to have increased over time.The largest FPGAs from Intel and Xilinx feature thousands of DSP modules and can deliver three orders of magnitude more MACs per second than the fastest DSP chips. For example, the largest members of the Intel Stratix 10 TX FPGA series offer 5760 precision-tunable DSP modules, each containing two 18×19 bit hardware multipliers, configurable as a 27×27 bit multiplier. On a large chip, there can be up to 11,520 hardware multipliers. The largest Xilinx Virtex UltraScale Plus FPGAs contain 12,288 DSP48E2 slices, each slice featuring a 27×18 bit multiplier and a 48-bit accumulator.Note that Intel and Xilinx are not the only FPGA vendors stuffing hardware multipliers into their FPGAs. You can get FPGAs from Achronix, Lattice, and Microchip that have various DSP hardware (MAC) built into the devices. For instance, the recently released Lattice CertusPRO-NX FPGAs come in two sizes, featuring 96 or 156 on-chip 18×18 bit multipliers.If you still want to write DSP code and run it on a single-chip DSP, you can use NXP’s DSP56300, DSP56700, and MSC8000 DSP series. These are the latest—perhaps the last—single-chip descendants of Motorola DSPs. Additionally, you can still purchase off-the-shelf members of the TI TMS320 FPGA series. Meanwhile, hardware multipliers have become very common in the designs of general-purpose processors, where you can find massive 512-bit SIMD vector units capable of delivering considerable DSP performance, even in microcontrollers, making it easier to integrate DSP into even the smallest embedded designs.For all of this, we can thank Moore’s Law.However, at this point, there is simply no comparison. If your high-performance DSP application requires a large number of fast MAC operations, then FPGAs with hundreds or thousands of fast hardware multipliers are the only qualified product available.Source: Moore News
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