A New RISC-V Architecture Leading Edge AI

A New RISC-V Architecture Leading Edge AI

Red Semiconductor has announced the launch of a multifunctional intrinsic structured computing (VISC) architecture for RISC-V. VISC is an extension of RISC-V IP that accelerates complex algorithms and adds parallel processing to improveedge computing‘s AI operations. Red Semiconductor’s CEOJames Lewis. One of the strong value points of RISC-V is the potential for customization within the … Read more

Design of Vision Servo Control for Six-Degree-of-Freedom Robot Based on FPGA EtherCAT

Design of Vision Servo Control for Six-Degree-of-Freedom Robot Based on FPGA EtherCAT

Made in China 2025 is the first decade action plan for the Chinese government to implement the strategy of becoming a manufacturing power, which is a major strategic deployment to comprehensively improve the quality and level of China’s manufacturing industry. It clearly points out the important position of innovative technologies surrounding industrial robots. Currently, industrial … Read more

Analysis and Verification of EtherCAT Slave Communication Link Based on FPGA

Analysis and Verification of EtherCAT Slave Communication Link Based on FPGA

Abstract: EtherCAT is one of the widely used field buses in the industrial control field. The slave controller ESC (EtherCAT Slave Controller) is the key to implementing EtherCAT protocol data communication in slave modules. Achieving autonomous control over slave control chips is an important foundation for the localization and research and development of industrial control … Read more

Selected System Design: FPGA-Based CAN Bus Controller Design

Today, I bring you the design of a CAN bus controller based on FPGA. Due to the lengthy content, it is divided into three parts. Today, I present the third part, followed by the next one, which covers the program simulation and testing, as well as a summary. Without further ado, let’s get started. I … Read more

Detailed Analysis of SPI Communication Between FPGA and STM32 (Part 1)

Detailed Analysis of SPI Communication Between FPGA and STM32 (Part 1)

Win a Backpack How Difficult Is It? Give It a Try! →_→ Long Press Recognition [Topic]: Detailed Analysis of SPI Communication Between FPGA and STM32 (Part 1) [Author]: LinCoding [Date]: 2016.11.26 Yesterday, I thoroughly reviewed SPI again. I felt that what I learned about SPI when studying STM32 was just the surface; this time, while … Read more

Everything You Need to Know About SPI Protocol

Everything You Need to Know About SPI Protocol

What is covered? Introduction to SPI Protocol 4-Wire or 3-Wire? 4 Operating Modes Multiple Transmission Rates Timing of SPI Protocol Upgraded SPI Protocol FPGA Implementation of SPI Protocol Comparison of SPI and IIC Conclusion Introduction to SPI Protocol The three most commonly used serial communication protocols between different chips on a board are UART, I2C, … Read more

Design and Verification of FPGA Programmable Logic Element Based on Sense-Switch pFLASH

Design and Verification of FPGA Programmable Logic Element Based on Sense-Switch pFLASH

Content Introduction Abstract: This paper proposes a programmable logic element (PLE) based on Sense-Switch type pFLASH technology. By programming the Sense-Switch type pFLASH, all three-input lookup table (LUT3) functions, some LUT4 functions, latch functions, and D flip-flop (DFF) functions with enable and reset capabilities are realized. Because the PLE uses a method called Combinational Operation … Read more

The Evolution Path of Future CPU Processor Technology

The Evolution Path of Future CPU Processor Technology

This article is excerpted from “2022 Research Framework for Domestic Server CPUs“. In the post-Moore’s Law era, the performance benefits brought by the improvement of process technology are already very limited. The Dennard Scaling law constraints have led to a sharp increase in chip power consumption, and the cost of transistors has risen instead of … Read more

Analysis of Chip Architecture Characteristics: CPU, GPU, NPU, FPGA, and More

Analysis of Chip Architecture Characteristics: CPU, GPU, NPU, FPGA, and More

1. Overview With the surge of artificial intelligence and the widespread application of AI algorithms, deep learning has become a key focus of current AI research. In the field of autonomous driving, environmental perception, sensor fusion, and control decision-making all involve deep learning to some extent. The performance of autonomous driving is directly related to … Read more

The Future of AI Chips: Not Necessarily GPUs

The Future of AI Chips: Not Necessarily GPUs

Source: Semiconductor Industry Review Original Author: Feng Ning In the layout of artificial intelligence computing architecture, the collaborative working model of CPUs and acceleration chips has become a typical AI deployment solution. The CPU plays the role of providing basic computing power, while the acceleration chips are responsible for enhancing computing performance to assist algorithms … Read more