How to Perform JTAG Boot and Debugging in SD Boot Mode on VCK190

How to Perform JTAG Boot and Debugging in SD Boot Mode on VCK190

Author: Xilinx Engineer Hank Fu The office has a VCK190 board running in SD boot mode, which can boot into Linux. However, now that we are working from home, we cannot change the boot mode of the VCK190 board. We need to run a Standalone program. Therefore, we hope that like MPSoC, when the Versal … Read more

Understanding JTAG Protection with TVS in Xilinx FPGA

Understanding JTAG Protection with TVS in Xilinx FPGA

Exploring the JTAG interface of the 7-series Xilinx FPGA and Zener diode protection When I was selecting the 7-series Xilinx FPGA for a new PCB design, I was unsure about the design of the JTAG interface. To find a reliable reference, I reviewed several schematic diagrams of Xilinx evaluation boards, among which the schematic of … Read more

Compilation of Technical Issues Discussed in the Group

Compilation of Technical Issues Discussed in the Group

1. Introduction Summarizing and organizing the technical issues discussed in the group recently, hoping to help more friends. 2. Sharing “Advanced Skills, Ultimate Memory Technology Guide_Full Version + SDRAM_model” This is a rare reference material for learning SDRAM. Follow the WeChat public account “Chip Verification Diary” and reply “sdram202308” to obtain it. Refer to the … Read more

Introduction to Common Internal Buses: IIC, IIS, SPI, UART, JTAG, CAN, SDIO, GPIO

Introduction to Common Internal Buses: IIC, IIS, SPI, UART, JTAG, CAN, SDIO, GPIO

▲Click the card above to follow for more information▲ 1IIC IIC (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS for connecting microcontrollers and their peripheral devices. The I2C bus transmits information between the bus and devices using two lines (SDA and SCL), allowing for serial communication between microcontrollers and external devices, or … Read more

RISC-V Processor and FPGA Reusing JTAG

RISC-V Processor and FPGA Reusing JTAG

Click to follow for more exciting content!! 01PARTIntroduction This article provides a brief explanation of the usage of BSCAN based on the Spartan-6 and Kintex-7 series of FPGAs, using the K735 development board and LS-Extended development board; the software used includes riscv-openocd and riscv-gdb (included in the toolchain). Principle Explanation02PART BSCAN stands for JTAG-boundary-scan, which … Read more

Understanding JTAG: A Comprehensive Guide

Understanding JTAG: A Comprehensive Guide

Introduction JTAG is something that IC and embedded enthusiasts must have used, but for those who don’t understand the internal workings of JTAG and its implementation, this article is worth a read. For those who have previously learned about coresight, you are aware of ARM’s internal debugging, knowing that the entry point for debugging lies … Read more

Basic Knowledge of JTAG

Basic Knowledge of JTAG

In 1985, European manufacturing organizations established the Joint European Test Action Group (JETAG) to research testing for integrated circuits. Later, in collaboration with North American companies, this organization was renamed JTAG (Joint Test Action Group) in 1986, and corresponding testing standards were designated. This standard was approved by IEEE in 1990 as an international standard … Read more

Using JTAG Debugging on I.MX6ULL Terminator Development Board

Using JTAG Debugging on I.MX6ULL Terminator Development Board

Many friends are transitioning from microcontrollers and are quite familiar with JTAG. They want to use JTAG to debug bare-metal code, but often encounter issues where the virtual machine cannot connect to the TF card. The I.MX6ULL itself supports JTAG, but there is really very little information available on this, and most of it is … Read more

Detailed Explanation of Zynq JTAG Mode Configuration and Boot Process

Detailed Explanation of Zynq JTAG Mode Configuration and Boot Process

Follow and star our official account for exciting content Source: https://blog.csdn.net/weixin_39847099/article/details/111802365Organized by: ZYNQ | Xiao Mo The JTAG Configuration Process of Zynq When first learning Zynq, I believe everyone, like me, follows the usual practice of opening the Vivado software, setting up the programmable logic (PL) part of Zynq, exporting the hardware deployment, then opening … Read more