JTAG Debugging with OpenOCD

JTAG Debugging with OpenOCD

OCD stands forOn-Chip Debugger, which is on-chip debugging. OpenOCD is an open-source JTAG debugging tool that operates as follows:The following diagram shows a physical connection, where the debugging target is theIntel Galileo Board, and the hardware box is the Flyswatter. The small board labeled 4 is theARM-JTAG-20-10 Adapter:When starting OpenOCD, a configuration file is passed … Read more

Definition and Meaning of JTAG Interface Pins

Definition and Meaning of JTAG Interface Pins

JTAG interfaces come in 10-pin, 14-pin, and 20-pin configurations. Although the number of pins and their arrangement differ, some pins are common across these configurations. The definitions of each pin are as follows: 1. Pin Definitions Test Clock Input (TCK) —– Required 1 TCK is mandated by the IEEE 1149.1 standard. TCK provides an independent, … Read more

JTAG Debugging – Halt and Step Execution

JTAG Debugging - Halt and Step Execution

Through JTAG Debugging – Introduction to DAP, a DAP consists of a DP and an AP, where the AP serves as a window to access the resources behind it. In JTAG debugging, Halt and Step Execution actually control the resources of the CPU behind the AP.In STM32F4xx, the Cortex-M4 registers are controlled via AHB-AP, allowing … Read more

Basics of DFT: JTAG

Basics of DFT: JTAG

JTAG: The Core Interface for Chip Testability Design In the field of integrated circuit (IC) design, Design for Testability (DFT) is a key technology to ensure high reliability and yield in chip production. JTAG (Joint Test Action Group), as a standard test access interface, has become an important means for modern chips to implement DFT … Read more

In-Depth JTAG Boundary Scan: Hardcore Techniques for Embedded Testing

In-Depth JTAG Boundary Scan: Hardcore Techniques for Embedded Testing

Hello everyone, welcome to <span>LiXin Embedded</span>. Today, we will discuss JTAG boundary scan. This tool is essential for testing PCB interconnections and internal chip logic, defined in the IEEE 1149.1 standard. If you haven’t read the first two articles in this series, I recommend going back to catch up on the basics of JTAG debugging. … Read more

Understanding JTAG Debugging and CMSIS-DAP

Understanding JTAG Debugging and CMSIS-DAP

CMSIS-DAP (Cortex Microcontroller Software Interface Standard – Debug Access Port) is a debug interface standard defined by ARM. In the introduction to JTAG debugging – DAP, it mentions that an implementation of ARM ADI is called DAP, so does CMSIS-DAP with the DAP suffix mean it is an implementation of DAP? See the diagram from … Read more

Introduction to JTAG Debugging and SWD

Introduction to JTAG Debugging and SWD

SWD stands for Serial Wire Debug Interface. Sometimes you may encounter terms like: JTAG-DP, SW-DP, SWJ-DP, which are interfaces for external hardware boxes. Among them, SWJ-DP was added in ADI v6.0:In summary: Physical Interface JTAG Interface? SWD Interface? Specification JTAG-DP Yes ADI v5.0/v6.0 SW-DP Yes ADI v5.0/v6.0Serial Wire (Serial Interface) SWJ-DP Yes Yes ADI v6.0Serial … Read more

A Quick Overview: Debugging Interfaces for Microcontrollers

A Quick Overview: Debugging Interfaces for Microcontrollers

In the process of microcontroller development, debugging is an indispensable step, and the interface serves as a bridge connecting the development environment with the target microcontroller. For engineers, to achieve excellent microcontroller debugging, it is essential to understand and master various interfaces. Below, we will list the interfaces used in microcontroller debugging. 1. JTAG Interface … Read more

OpenOCD: The Essential Tool for Embedded System Debugging, Mastering JTAG and SWD

OpenOCD: The Essential Tool for Embedded System Debugging, Mastering JTAG and SWD

OpenOCD (Open On-Chip Debugger) is a powerful open-source project that provides in-chip programming and debugging support for embedded systems. It supports various JTAG interfaces and target chips, and its rich features make it an essential tool for embedded developers. This article will delve into the functionalities, usage, installation, and configuration of OpenOCD, revealing the technical … Read more

JTAG Debugging – TAP Controller

JTAG Debugging - TAP Controller

Implementing the TAP controller within the SoC, interfacing with the JTAG chip in the JTAG hardware box to receive and process JTAG sequences. Its main structure is as follows:As can be seen, there is a state machine, an Instruction Register (IR), several Data Registers (DR), a Bypass Register, etc.The state machine is controlled by TMS, … Read more