Methods Related to Low Power: 1. Clock Gating The RTL code must follow the low power style, and there should be at least three or four registers after the enable signal for the tool to synthesize it into a clock gate. 2. Lower VT 3. Gate Level Power Optimization 4. In terms of architecture, this … Read more
This article continues from the previous piece titled “Key Developments in the Internet of Things (Part I): Seamless Connectivity andAI Integration as the Winning Focus!“, featuring an interview with Zhou Wei, General Manager of Silicon Labs (芯科科技) in China, and Chen Youyan, Senior Regional Sales Manager for South China. They continue to discuss the trends … Read more
In recent years, smart locks have become an important entry point for smart homes, with the market size continuously expanding. Previously, products mainly featured a single function of “fingerprint + password”; however, as users’ demands for security and interactive experience continue to rise, smart locks are rapidly evolving towards a three-in-one form of “lock + … Read more
In scenarios such as traffic safety, emergency command, and construction warnings, high-brightness flashing warning lights play a crucial role as a visual warning method. Traditional warning lights often use simple timing circuits or low-performance microcontrollers, leading to issues such as insufficient brightness, high power consumption, and limited functionality. Shenzhen Sanfo Technology has proposed a control … Read more
Hello everyone, I am Architect Xiao En, here to explain the knowledge for the senior architect and system analyst examination in a fun way. Today, we will talk about the special forces — Embedded Operating Systems. If general-purpose operating systems (like Windows and Linux) are likened to “all-round warriors”, then embedded operating systems are like … Read more
Click the blue text to follow us “IEEE 1801, better known in the industry as the UPF standard, is a methodology for describing power intent, designing, and verifying power management architectures. Since its introduction, this standard has undergone four major updates, and compatibility issues between different versions have made it one of the hardest standards … Read more
Dear friends, hello everyone! I am “Dai Yi Zong”. Today, the topic we are going to learn about is microcontroller low power design techniques. I believe everyone knows that energy saving and environmental protection are issues that we all take seriously. As a microcontroller engineer, we have a responsibility to contribute our part to the … Read more
Have you ever worked on low power consumption products? Low power products may seem simple, but to create a low power product, especially achieving ultra-low power consumption, is relatively more challenging. Today, we will discuss the approach to low power design in an RTOS environment. Preface: Programming Mindset The design of embedded products is diverse … Read more
The first thing to focus on when designing a chip is its PPA (Performance, Power, Area). This article discusses the second P, Power consumption, and how to achieve low power design in RTL, which is crucial for the battery life of mobile devices. Don’t let your chip unnecessarily increase power consumption. Data Path Register Sampling … Read more
Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the best and largest pure FPGA engineer community in China. When designing chips, the first thing to focus on is the chip’s PPA (Performance, Power, Area). This article discusses the second P, Power consumption, and how … Read more