Bluetooth Low Energy (BLE) is a wireless communication technology designed specifically for Internet of Things (IoT) devices. Compared to traditional Bluetooth, BLE has the following advantages: • Ultra-low power consumption: A button battery can last for several months or even years • Fast connection: Connection establishment takes only a few milliseconds • Low cost: Chip … Read more
Bluetooth Low Energy (BLE) is a wireless communication technology designed for IoT devices. Compared to traditional Bluetooth, BLE has the following advantages: • Ultra-low power consumption: A button battery can last for months or even years • Fast connection: Connection establishment takes only a few milliseconds • Low cost: Low chip prices and low development … Read more
1. IntroductionPower optimization for FPGAs is a systematic project that requires collaborative optimization from multiple levels including design architecture, RTL code, tool configuration, and physical implementation, while balancing performance, area, and power consumption (PPA). For Zynq/MPSoC, which also includes the PS side, there are more factors to consider and more methods to apply. For example, … Read more
Methods Related to Low Power: 1. Clock Gating The RTL code must follow the low power style, and there should be at least three or four registers after the enable signal for the tool to synthesize it into a clock gate. 2. Lower VT 3. Gate Level Power Optimization 4. In terms of architecture, this … Read more
Identity is credit, and credit is service Introduction The Bluetooth fingerprint padlock is widely used in fields such as warehousing, personal item protection, and the sharing economy due to its convenience and security. This article provides a detailed analysis of the entire process from architectural design to mass production, focusing on the technical implementation of … Read more
This article is reprinted from the WeChat public account: FPGA Algorithm Engineer We all know that recently, the topics of chip design and manufacturing continue to occupy people’s conversations. The enemy’s pursuit has made us abandon our fantasies and fight back. In our work and life, whether we are in the upstream or downstream of … Read more
Low Power Design in Video Codec This paper introduces three techniques: two-layer clock gating, skip mode, and a three-layer memory structure with a memory access unit, to optimize gate-level circuits and reduce power consumption in digital systems. Two-layer Clock Gating **Figure 1: Two Types of Clock Gating** Among the various power optimization techniques proposed, clock … Read more
1.ASIC Basic Concepts 1.Definition: An Application Specific Integrated Circuit (ASIC) is an integrated circuit designed and manufactured for a specific application. Unlike general-purpose integrated circuits, it is customized for a single or a group of specific tasks to achieve optimal performance, power consumption, and cost-effectiveness. 2.Background: With the diversification and refinement of electronic device functions, … Read more
In the deep power optimization of the ESP32, power consumption optimization is the core goal for extending battery life and improving device efficiency. The following are comprehensive optimization strategies based on the hardware characteristics and software capabilities of the ESP32, covering power mode management, dynamic power control, hardware design techniques, software optimization and data retention … Read more
The power optimization hardware design for the ESP32 is the cornerstone of achieving ultra-low power systems, requiring meticulous control over power architecture, peripheral circuits, PCB layout, and more. Below are hardware-level optimization solutions validated by engineering: 1. Power Topology Optimization 1. Efficient Power Conversion Solutions Scenario Recommended Solution Static Current Conversion Efficiency Key Models Input … Read more