The “opening pad” process for image sensors (especially CMOS image sensors, CIS), officially known as “aluminum pad layer etching” or “passivation layer opening” process, is a critical step in the backend of chip manufacturing. The purpose of this step is to open the insulating layer (passivation layer) on the pads that electrically connect the internal circuits of the chip to the outside world, exposing the metal pads for subsequent probe testing and packaging wire bonding. Below are the detailed steps, principles, and precautions.
—Step 1: Preparation and Photolithography
Before this step, the chip has completed all front-end processes (transistor manufacturing, interconnections, CMOS circuits, etc.) and has formed metal pads on the top layer, covered by a passivation layer over the entire chip surface.
1. Deposition of the passivation layer:
· Material: Typically a composite layer made of silicon nitride and silicon oxide. Silicon nitride is dense and hard, effectively blocking moisture and sodium ions, while silicon oxide serves as a stress buffer layer.
· Purpose: To protect the internal circuits of the chip from scratches, moisture, chemical corrosion, and ionic contamination.
2. Coating of photoresist:
· A layer of UV-sensitive photoresist is evenly coated on the surface of the passivation layer.
3. Exposure:
· A specially designed “opening pad” photomask is used. The pattern on this mask is the array of all pads that need to be exposed.
· Ultraviolet light is projected through the photomask onto the photoresist using a photolithography machine. The photoresist in the opening areas is exposed (for positive photoresist).
4. Development:
· A chemical developer is used to dissolve the exposed areas of the photoresist. This exposes the passivation layer at the pad locations while protecting other areas with the photoresist.
Step 2: Dry Etching – Core Step
This is the most critical step, requiring precise removal of the passivation layer without damaging the underlying metal pads.
1. Etching Mechanism:
· Plasma dry etching is used, primarily due to its good anisotropy (vertical etching with minimal lateral etching), allowing for steep and clean openings.
· The process is conducted in a vacuum reaction chamber.
2. Selection of Chemical Gases:
· Main gases: Tetrafluoromethane (CF₄), Sulfur hexafluoride (SF₆), and other fluorinated gases.
· Mechanism: In the plasma, these gases dissociate into highly reactive fluorine radicals (F*). The fluorine radicals chemically react with silicon (Si) in the passivation layer, generating volatile silicon tetrafluoride (SiF₄) gas, which is then evacuated by the vacuum system.
· Example reaction: Si₃N₄ + 12F* → 3SiF₄↑ + 2N₂↑
3. Endpoint Detection:
· This is a key technology to ensure the success of the process. Since the passivation layer is very thin, it is crucial to precisely control the etching to stop at the surface of the metal pads.
· Method: The optical emission spectroscopy method is used to monitor the intensity of specific wavelengths of light in the plasma in real-time. When the passivation layer (such as silicon nitride) is completely etched away, exposing the underlying metal (usually aluminum), a sudden change in the emission spectrum occurs. The system detects this signal and immediately stops the etching to prevent over-etching damage to the aluminum pad.
Step 3: Photoresist Removal and Cleaning
1. Photoresist Removal:
· Oxygen plasma ashing and/or wet chemical photoresist removal solutions are used to thoroughly eliminate any residual photoresist.
· Oxygen plasma oxidizes the organic photoresist into carbon dioxide and water vapor.
2. Wet Cleaning:
· High-purity solvents (such as acetone, IPA) and dilute acid solutions are used for ultrasonic or megasonic cleaning to remove all contaminants, polymer residues, and metal pollutants generated during the etching and photoresist removal processes.
· This step is crucial for ensuring the success rate and reliability of subsequent bonding.
Step 4: Post-Processing and Inspection
1. Annealing:
· Sometimes a low-temperature annealing process (for example, in forming gas, a nitrogen-hydrogen mixture) is performed to repair any minor damage to the chip surface caused by the etching process and to stabilize device performance.
2. Key Quality Inspection:
· Optical microscope inspection: Check if the openings are complete, accurately positioned, and free of residues.
· Scanning electron microscope: More finely inspect the profile morphology of the openings to see if the etching is vertical and if there are any undercuts or residues.
· Probe testing: Directly contact the exposed aluminum pads with a probe card to perform electrical performance tests, confirming whether the chip functions normally.
—Process Challenges and Core Control Parameters
1. Selectivity: The etching process must have a very high passivation layer/metal pad selectivity. That is, the etching rate of silicon nitride/silicon oxide must be much faster than that of aluminum. This way, even with slight over-etching, there will be no severe damage to the aluminum pad.
2. Uniformity: The opening depth and size of thousands of pads across the entire wafer must be highly uniform.
3. Plasma Damage: Charged particles in the plasma may damage sensitive image sensor pixel areas, affecting dark current and white spots. Therefore, it is necessary to optimize plasma power and pressure or adopt designs resistant to plasma damage.
4. Polymer Residue: Non-volatile fluorocarbon polymers may be generated during the etching process and must be thoroughly removed through subsequent cleaning; otherwise, they will affect bonding strength.
5. Aluminum Pad Corrosion: If cleaning is not thorough, residual halogen elements (such as chlorine, fluorine) can cause electrochemical corrosion of aluminum in a humid environment, leading to pad failure.
Conclusion
The opening pad process for image sensors is a precise and controllable subtractive manufacturing process. It defines patterns through photolithography, accurately removes the passivation layer through dry etching, and is complemented by rigorous cleaning and inspection, ultimately achieving the “window” for electrical connection to the chip. The quality of this step directly determines whether the chip can be correctly tested and reliably packaged, serving as the lifeline connecting the “internal and external worlds” of the chip.