ARMv8 Cache Coherency Solutions: MOESI Protocol

ARMv8 Cache Coherency Solutions: MOESI Protocol

1. MOESI State Definitions The ARMv8 architecture uses the MOESI protocol to maintain data consistency across multiple cores. The MOESI protocol describes the state of a shared cache line in L1 Data Cache as follows: M, Modified, Unique Dirty, only exists in the current cache (unique) and the data in this cache line is different … Read more

Systematic Mastery of Armv8/Armv9 Architecture

Systematic Mastery of Armv8/Armv9 Architecture

Learning Method Learning the Arm architecture versions v8 and v9 requires a deep understanding of several key concepts and mechanisms, including GIC (Interrupt Controller), exception handling, MMU (Memory Management Unit), memory management, caching, TrustZone security architecture, security features, and the exclusive mechanism. Below is an efficient learning method that covers these important topics: Establish a … Read more

Deep Learning on Armv8/Armv9 MMU

Deep Learning on Armv8/Armv9 MMU

Click the blue "Arm Selected" in the upper left corner and select "Set as Favorite" Thoughts 1. Why use virtual addresses? Why use MMU? 2. The MMU hardware completes address translation, what else do we need to do in software? 3. Where is the MMU? What is the relationship between MMU and SMMU? 1. Introduction … Read more

Detailed Analysis of the U-Boot Boot Process on ARMv8 Architecture

Detailed Analysis of the U-Boot Boot Process on ARMv8 Architecture

Click the above“Embedded and Linux Matters”, select“Pin/Star Public Account” Welfare content, delivered first-hand This article is based on the ARMv8 architecture to analyze the U-Boot boot process, with U-Boot version 2022-01. 1 Overview First, let’s quote an introduction from Wiki: U-Boot is a bootloader primarily used for embedded systems that can support various computer system … Read more

Learning Notes on ARMv8 Official Manual: Device Memory

Learning Notes on ARMv8 Official Manual: Device Memory

Definition of Device Memory The Device memory type attributes define memory locations where an access to the location can cause side-effects, or where the value returned for a load can vary depending on the number of loads performed. Typically, the Device memory attributes are used for memory-mapped peripherals and similar locations. Device Memory Attributes: Gathering, … Read more

Introduction to ARMV8-A MMU – Part 2

Introduction to ARMV8-A MMU - Part 2

Continuing from the previous article on ARMV8-A MMU – Part 1. IPS[34:32] (Intermediate Physical Address Size) controls the size of the IPA address space. When IPS=000, it indicates a 32-bit address space; when IPS=101, it indicates a 48-bit address space. The meanings of other values can be referenced in the ARMv8 documentation. After setting the … Read more

Things You May Not Know About ARMv7/ARMv8/ARMv9 Architectures

Things You May Not Know About ARMv7/ARMv8/ARMv9 Architectures

1. Although ARMv7 products are still frequently seen in the market and many students are learning ARMv7, it has been 15 years since ARMv7 was released, and ARMv8 has been out for 10 years. 2. Despite the popularity of ARM, which occupies various fields in the market and has many programmers closely related to it, … Read more

Linux Memory Management: Huge Pages

Linux Memory Management: Huge Pages

1. IntroductionRecently, a group member in our WeChat group encountered a problem: on an ARMv8 architecture CPU, after the Linux system starts, when dynamically enabling 1G huge pages, the maximum contiguous memory allocated is only 32M.This has caused confusion among everyone, and with this issue in mind, today we will discuss huge pages.2. What are … Read more

Exception and Interrupt Model of Armv8/Armv9

Exception and Interrupt Model of Armv8/Armv9

Click the blue "Arm Selection" in the upper left corner and select "Set as Favorite" 1 Introduction This article introduces the exception and privilege model in Armv8-A. It covers the different types of exceptions in the Arm architecture and the behavior of the processor when an exception is received. This article is relevant for developers … Read more