Definition of Device Memory
The Device memory type attributes define memory locations where an access to the location can cause side-effects, or where the value returned for a load can vary depending on the number of loads performed. Typically, the Device memory attributes are used for memory-mapped peripherals and similar locations.
Device Memory Attributes: Gathering, Reordering, Early Write Acknowledgement
Gathering
Device memory attributes:
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G indicates that the memory has Gathering attributes;
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nG indicates that the memory has non-Gathering attributes;
The Gathering attribute indicates whether the following permissions exist:
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Read or write operations on the same type of memory within the same block can be merged into a single transaction. For example: if there are two read accesses to the same address in the code, the processor must strictly perform two read transactions.
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Read or write operations on the same type but different memories can be merged into a single transaction. For example, two byte writes can merge into a halfword write.
For memory with Gathering attributes, as long as the rules of ordering and coherency are followed, the above two behaviors are allowed.
Reordering
Device memory attributes:
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R indicates that the memory has reordering attributes.
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nR indicates that the memory does not have reordering attributes.
Note:
Reordering allows the processor to (optimize) rearrange memory access instructions.
Early Write Acknowledgement
Device memory attributes:
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E indicates that the memory has Early Write Acknowledgement attributes.
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nE indicates that the memory does not have Early Write Acknowledgement attributes.
For memory systems, the final end of a PE write operation is indicated by receiving a response. For memory without Early Write Acknowledgement attributes, it is required that:
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The write operation must receive a final destination acknowledgment;
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No other nodes are allowed to provide an acknowledgment in advance;
To understand this in conjunction with the following: PE access to memory is a question-and-answer process (the more professional term is called transaction). For writes, PE needs a write acknowledgment operation to confirm the completion of a write transaction. To speed up writes, intermediate stages of the system may set up some write buffers. nE indicates that the acknowledgment for the write operation must come from the final destination rather than from an intermediate write buffer.
Device memory supports the following types
Device-nGnRnE
Device non-Gathering, non-Reordering, No Early write acknowledgement.
Equivalent to the Strongly-ordered memory type in earlier versions of the architecture.
Device-nGnRE
Device non-Gathering, non-Reordering, Early Write Acknowledgement.
Equivalent to the Device memory type in earlier versions of the architecture.
Device-nGRE
Device non-Gathering, Reordering, Early Write Acknowledgement.
ARMv8 adds this memory type to the translation table formats found in earlier versions of the architecture. The use of barriers is required to order accesses to Device-nGRE memory.
Device-GRE
Device Gathering, Reordering, Early Write Acknowledgement.
ARMv8 adds this memory type to the translation table formats found in earlier versions of the architecture. Device-GRE memory has the fewest constraints. It behaves similarly to Normal memory, with the restriction that speculative accesses to Device-GRE memory are forbidden.
References:
The ARM Architecture Reference Manual, for ARMv8-A architecture profile, B2.7.2 Device memory
Please feel free to correct any errors.