System Practice Learning ARMv8 Assembly – Course 4

System Practice Learning ARMv8 Assembly - Course 4

Course 4: Detailed Explanation and Practical Application of ARMv8 Assembly Pseudo Instructions Pseudo instructions (Directives) are auxiliary instructions provided by the assembler to control code generation, data allocation, segment structure, etc.,which do not directly translate into machine code. Below is a classification and example analysis of commonly used pseudo instructions in ARMv8 assembly: 1. Segment … Read more

Deep Dive into ARM Embedded Systems | ARMV8 Linker Script u-boot.lds Source Code Analysis

Deep Dive into ARM Embedded Systems | ARMV8 Linker Script u-boot.lds Source Code Analysis

u-boot.lds is the linker script file for the u-boot project, which plays a crucial role in the compilation and linking of the project. It determines the assembly of u-boot and instructs the linker on how to combine the sections from various source files (such as assembly and C source files) into the final executable file. … Read more

System Practice Learning ARMv8 Assembly – Course 2

System Practice Learning ARMv8 Assembly - Course 2

Course 2: Stage 1 – Basic Preparation (Week 2) Topic: Detailed Explanation of ARMv8 Registers and Instruction Set, Bare-Metal Programming Practice 2.1 In-Depth Analysis of Registers Classification of ARMv8 Registers: General Purpose Registers (31): <span>X0</span>: Function Argument 1 / Return Value. <span>X1-X7</span>: Function Arguments 2-8. <span>X8</span>: System Call Number. <span>X29</span>: Frame Pointer (FP). <span>X30</span>: Link … Read more

System Practice Learning ARMv8 Assembly – Course 5

System Practice Learning ARMv8 Assembly - Course 5

Course 5: Phase 2 – Core Instructions and Programming Topic: Memory Operations and Complex Data Structures, Bare-Metal Programming Practice 5.1 Advanced Memory Operations Multi-Byte Memory Operations <span>LDP</span>/<span>STP</span>: Load/Store two registers at once (supports 64-bit and 32-bit modes). stp x0, x1, [sp, #-16]! // Push x0 and x1 onto the stack, SP -= 16 ldp x2, … Read more

System Practice Learning ARMv8 Assembly – Outline

System Practice Learning ARMv8 Assembly - Outline

Let’s set a learning plan for ARMv8 assembly language. After learning, aim to master ARMv8 assembly knowledge and be able to write some simple assembly code. Phase 1: Basic Preparation (1-2 weeks) Goals: Understand computer architecture and core concepts of the ARMv8 architecture. Set up the development environment. Write the first assembly program. Learning Content: … Read more

System Practice Learning ARMv8 Assembly – Course 3

System Practice Learning ARMv8 Assembly - Course 3

Course 3: Stage 2 – Core Instructions and Programming Topic:Function Calls and Stack Operations, ARMv8 Calling Conventions, Bare-Metal Programming Practice 3.1 Basics of Function Calls Core Concepts: BL Instruction: <span>BL label</span>:Jump to<span>label</span> to execute, while saving the return address (the address of the next instruction) to<span>LR</span> (X30). After the function call, return using<span>RET</span> (<span>RET</span> is … Read more

System Practice Learning ARMv8 Assembly – Course 1

System Practice Learning ARMv8 Assembly - Course 1

Course 1: Stage 1 – Basic Preparation (Week 1) Topic: Bare-metal program development, PL011 UART communication, ARMv8 boot process 1.1 Basics of Bare-metal Programming Core Concepts: Bare-metal Program: Runs directly on hardware without operating system support. Boot Process: The CPU starts executing instructions from the reset address (usually <span>0x0</span> or <span>0x8000</span>). Hardware (such as memory … Read more

Asynchronous Exception Types, Routing, and Masking in Armv8/Armv9

Asynchronous Exception Types, Routing, and Masking in Armv8/Armv9

Click the blue "Arm Selected" in the upper left corner and select "Set as Favorite" Types of Asynchronous Exceptions What asynchronous exceptions (interrupts) exist in the system? Official documentation states:<span><span>In the Armv8-A architecture, asynchronous exceptions that are taken to AArch64 state are also known as interrupts.</span></span> Anyone who says interrupts are: FIQ, IRQ is a … Read more

Why Is The Browser So Complex With Millions Of Lines Of Code?

Why Is The Browser So Complex With Millions Of Lines Of Code?

https://www.zhihu.com/question/290767285/answer/1200063036 Author: Longquan Temple Sweeping Monk (Chief Browser Architecture Expert, Author of the World’s Smallest Chromium Kernel – Miniblink), authorized for reprint Let’s take a look at the open-source Chromium; it is indeed extremely complex. The source code alone is over ten gigabytes. We can’t help but wonder, what exactly is in Chromium? How can … Read more

Understanding A64, ARMv8, ARMv9, and AArch64 Architectures

Understanding A64, ARMv8, ARMv9, and AArch64 Architectures

Thought: A64 refers to the instruction set architecture, aarch64 is the 64-bit architecture, armv8/armv9 are also architectures, Trustzone is a type of security architecture, they are all architectures, confused? What is arm64? 1. armv7/armv8/armv9 are the real architectures of ARM. The term architecture can be understood as a technical specification, a technical reference, a design, … Read more