Learning with Questions: 30 Interview Questions on ARMv8/ARMv9

Learning with Questions: 30 Interview Questions on ARMv8/ARMv9

1. What is the ARMv8/ARMv9 architecture, and how does it differ from other versions of ARM? 2. What does AArch64 refer to in the ARMv8/ARMv9 architecture, and how does it differ from AArch32? 3. What new instruction sets have been introduced in the ARMv8/ARMv9 architecture, and what are their purposes? 4. What privilege levels are … Read more

LIBSHALOM: Optimizing Small and Irregular-Shaped Matrix Multiplications on ARMv8 Multi-Core Processors

LIBSHALOM: Optimizing Small and Irregular-Shaped Matrix Multiplications on ARMv8 Multi-Core Processors

The International Conference for High Performance Computing, Networking, Storage and Analysis (SC) was held from November 14-19, 2021, in St. Louis, Missouri, USA. SC is one of the top conferences in the field of high-performance computing, primarily featuring significant academic contributions in areas such as system architecture, high-performance networking, and system performance evaluation. To date, … Read more

Achieving Sub-Microsecond System Response with WangHuo Real-Time Linux

Achieving Sub-Microsecond System Response with WangHuo Real-Time Linux

In the previous article《The Fastest Real-Time Linux with Maximum Response Latency of 480 Nanoseconds Released by Guoke Huanyu》, we showcased the actual performance of the system achieving sub-microsecond end-to-end response, which garnered significant attention. This article provides key implementation paths and engineering points to facilitate users in quickly reproducing and further optimizing the results. Linux … Read more

Introduction to Memory Management in Armv8/Armv9

Introduction to Memory Management in Armv8/Armv9

Click the blue "Arm Selection" in the upper left corner and choose "Set as Star" 1 Overview This article introduces memory translation in Armv8-A, which is key to memory management. It explains how virtual addresses are converted to physical addresses, the format of translation tables, and how software manages Translation Lookaside Buffers (TLB). This is … Read more

Differences Between Armv8 Synchronization Exceptions, External Abort, SError, Prefetch Abort, and Data Abort

Differences Between Armv8 Synchronization Exceptions, External Abort, SError, Prefetch Abort, and Data Abort

Click the blue "Arm Selected" in the upper left corner and choose "Set as Star" Thank you all for your attention, thank you thank you thank you, once again thank you! 1. Concepts of Synchronous and Asynchronous Exceptions The following three behaviors are referred to as synchronous exceptions: • The exception is generated as a … Read more

ARMv8 Synchronization and Semaphores: Load-Exclusive/Store-Exclusive Instructions Explained

ARMv8 Synchronization and Semaphores: Load-Exclusive/Store-Exclusive Instructions Explained

In the previous article, the basic principles of synchronization and semaphores in ARMv8 were introduced: An Overview of ARMv8 Memory Types and Attributes. This article continues to explore this topic by detailing the exclusive-related instructions: Load-Exclusive/Store-Exclusive usage. 1. Local Monitor and Global Monitor The article on An Overview of ARMv8 Memory Types and Attributes provides … Read more

From Confusion to Mastery: Understanding Armv8-A and Armv9-A Architectures

From Confusion to Mastery: Understanding Armv8-A and Armv9-A Architectures

Whether you are an IC design engineer, verification engineer, FPGA engineer, architecture engineer, or a student in microelectronics, you must be familiar with the ARM architecture. Choosing the Arm architecture is a very suitable option because its advantages include easy commercial promotion, the ability to utilize Arm’s mature ecosystem, and use Arm’s mature IP. Coupled … Read more

Detailed Explanation of Interrupts in ARMv8/ARMv9 – Interrupt Examples (Virtualization Part)

Detailed Explanation of Interrupts in ARMv8/ARMv9 - Interrupt Examples (Virtualization Part)

Click the blue "Arm Selected" in the top left corner and select "Set as Star" Drainage Keywords: armv8, armv9, gic, gicv2, gicv3, exceptions, interrupts, irq, fiq, serror, sync, synchronous exceptions, asynchronous exceptions, vector table, vector table base address, VBAR, vbar_el3, interrupt nesting, interrupt cascading, Linux Kernel, optee, ATF, TF-A, optee, hypervisor, SPM The relevant control … Read more

ARMv8 Official Manual Study Notes (8): Cache and Memory Hierarchy

ARMv8 Official Manual Study Notes (8): Cache and Memory Hierarchy

Introduction to Cache Cache is a block of memory in ARM that can be accessed at high speed. Each cache block contains: 1. Main memory address information; 2. Cached data. Cache can significantly increase the average speed of memory access. Cache has the following two characteristics: 1. Access locations are spatially limited. An access to … Read more

NUMA-Aware Optimization of Sparse Matrix-Vector Multiplication on ARMv8-based Many-Core Architectures

NUMA-Aware Optimization of Sparse Matrix-Vector Multiplication on ARMv8-based Many-Core Architectures

Original Information Title: NUMA-Aware Optimization of Sparse Matrix-Vector Multiplication on ARMv8-based Many-Core Architectures Published Conference: The 17th Annual IFIP International Conference on Network and Parallel Computing (CCF Class C Conference) Author List 1) Yuxiaosong, China University of Petroleum (Beijing), School of Information Science and Engineering, Major in Computer Science and Technology, Graduate Class of 2019 … Read more