Kirin X90 Emerges, Accelerating the Journey of Domestic Chip Replacement. Before starting this article, I would like to clarify that this article represents my personal views, and the sources are from the internet. Please do not criticize if you disagree. Amidst the fierce competition in the TSMC 3nm and Samsung 2nm chip markets, a PC … Read more
Arm Holdings Limited (NASDAQ: ARM, hereinafter referred to as Arm) recently announced the expansion of the Arm® Flexible Access program to include the world’s first Armv9 edge AI computing platform optimized for IoT and edge AI workloads. This platform comprises the Arm Cortex®-A320 CPU and the Arm Ethos™-U85 NPU, both of which will be integrated … Read more
1. What is the ARMv8/ARMv9 architecture, and how does it differ from other versions of ARM? 2. What does AArch64 refer to in the ARMv8/ARMv9 architecture, and how does it differ from AArch32? 3. What new instruction sets have been introduced in the ARMv8/ARMv9 architecture, and what are their purposes? 4. What privilege levels are … Read more
Whether you are an IC design engineer, verification engineer, FPGA engineer, architecture engineer, or a student in microelectronics, you must be familiar with the ARM architecture. Choosing the Arm architecture is a very suitable option because its advantages include easy commercial promotion, the ability to utilize Arm’s mature ecosystem, and use Arm’s mature IP. Coupled … Read more
Click the blue "Arm Selected" in the top left corner and select "Set as Star" Drainage Keywords: armv8, armv9, gic, gicv2, gicv3, exceptions, interrupts, irq, fiq, serror, sync, synchronous exceptions, asynchronous exceptions, vector table, vector table base address, VBAR, vbar_el3, interrupt nesting, interrupt cascading, Linux Kernel, optee, ATF, TF-A, optee, hypervisor, SPM The relevant control … Read more
Learning Method Learning the Arm architecture versions v8 and v9 requires a deep understanding of several key concepts and mechanisms, including GIC (Interrupt Controller), exception handling, MMU (Memory Management Unit), memory management, caching, TrustZone security architecture, security features, and the exclusive mechanism. Below is an efficient learning method that covers these important topics: Establish a … Read more
Click the blue "Arm Selected" in the upper left corner and select "Set as Favorite" Thoughts 1. Why use virtual addresses? Why use MMU? 2. The MMU hardware completes address translation, what else do we need to do in software? 3. Where is the MMU? What is the relationship between MMU and SMMU? 1. Introduction … Read more
Click the blue "Arm Selected" at the top left, and choose "Set as Favorite" 9 L2 Memory System The L2 memory system of the Cortex-A720 core connects the core to the DynamIQ Shared Unit-120 via the CPU bridge, which includes private L2 caches. The L2 cache is unified, with each Cortex-A720 core having a private … Read more
In 2021, Arm launched the Cortex-A710, the first big core under the armv9 architecture. This year (June 28, 2022), Arm introduced their latest next-generation big core, the Cortex-A715 (also known as Makalu). Following the Cortex-A710, the A715, as the latest big core, supports several enhancements that are largely similar to the ARMv9.0 ISA. More critically, … Read more
On September 30, according to foreign media wccftech, Qualcomm is set to release its next-generation flagship mobile processor, the Snapdragon 8 Gen 2, in mid-November 2022. The latest leaks indicate that the Snapdragon 8 Gen 2 will adopt a new “quad cluster” architecture, moving from the “tri-cluster” architecture of the previous Snapdragon 8 Plus Gen … Read more