Page Tables Articles

Detailed Explanation of Memory Management in Linux

2026-06-07 by boardor

来源： https://blog.csdn.net/qq_40276626/article/details/120477263 Memory Management in Linux The main task of memory management is to organize physical memory, followed by the allocation and reclamation of physical memory. However, Linux introduces the concept of virtual addresses. The Role of Virtual AddressesIf user processes directly manipulate physical addresses, the following issues may arise:1. User processes can directly manipulate … Read more

In-Depth Analysis of Linux Processes: Core Techniques to Boost Your Efficiency!

2026-04-24 by boardor

Linux | Red Hat Certification | IT Technology | Operations Engineer 👇 Join the technical exchange QQ group with 1000 members, note 【Official Account】 for faster approval 1. Concept of Address Space In the study of C/C++ language, we often hear people discussing the concept of addresses in memory. In Linux, the exact concept is … Read more

Detailed Introduction to ARMv8/ARMv9 Page Table Attributes

2026-04-17 by boardor

1 Stage 1 Page Table Attributes (Attribute fields in stage 1 VMSAv8-64 Block and Page descriptors) PBHA, bits[62:59]: for FEAT_HPDS2 XN or UXN, bit[54]: Execute-never or Unprivileged execute-never PXN, bit[53]: Privileged execute-never Contiguous, bit[52]: The translation table entry is contiguous and can exist in a TLB Entry DBM, bit[51]: Dirty Bit Modifier GP, bit[50]: for … Read more

28 Questions About Learning Armv8/Armv9 MMU

2026-04-16 by boardor

01. How many MMUs are there in a large system? 02. How many Translation regimes are there in an ARM Core? 03. What are the differences among EL1&0 Translation regime Stage 2, EL2 Translation regime Stage 1, and EL2&0 Translation regime Stage 1? 04. What is special about the TTBR1EL2 register, and who uses this … Read more

ARMv8 MMU and Linux Page Table Mapping

2026-04-13 by boardor

Background Read the fucking source code! –By Lu Xun A picture is worth a thousand words. –By Gorky Note: Kernel Version: 4.14 ARM64 Processor, Cortex-A53, Dual-core Tools Used: Source Insight 3.5, Visio 1. Introduction To understand Linux page table mapping well, it is necessary to be familiar with the MMU mechanism, so these two modules … Read more

Introduction to ARMV8-A MMU – Part 2

2026-04-13 by boardor

Continuing from the previous article on ARMV8-A MMU – Part 1. IPS[34:32] (Intermediate Physical Address Size) controls the size of the IPA address space. When IPS=000, it indicates a 32-bit address space; when IPS=101, it indicates a 48-bit address space. The meanings of other values can be referenced in the ARMv8 documentation. After setting the … Read more

Introduction to MMU in ARMV8-A – Part 3

2026-04-13 by boardor

Continuing from the previous article on Introduction to MMU in ARMV8-A – Part 2. This article will continue from the last section and explain the multi-level page tables of MMU. The previous section discussed an example of a single-level page table, while this section will discuss an example of a two-level page table. Below is … Read more

Introduction to MMU in ARMV8-A – Part 1

2026-04-13 by boardor

1. Concept of Address Translation The code in ARMV8-A generally uses virtual addresses for addressing access, which are converted into physical addresses in the memory system. This conversion is performed by a component of the processor called the MMU. The MMU uses a translation table to convert virtual addresses to physical addresses; this translation table … Read more

Introduction to MMU in ARMV8-A – Part 5

2026-04-13 by boardor

Continuing from the previous article, Introduction to MMU in ARMV8-A – Part 4. Page Tables in ARMV8-A ARMV8-A supports three types of page table formats: ARMV8-A AArch64 Long Descriptor Format ARMV7-A Long Descriptor Format, such as the Large Physical Address Extension (LPAE) in the ARM Cortex-A15 processor ARMV7-A Short Descriptor Format Although ARMV8-A uses the … Read more