On November 10, Guoxin Technology (688262.SH) announced on the investor interaction platform that the company is collaborating with the Hong Kong Applied Science and Technology Research Institute in the field of NPU, focusing on AI technology research and development for edge applications, resulting in the CNN20, CNN100, and CNN200 series of NPU IP cores. The designs for CNN20 and CNN100 have been completed and are available for external licensing, while CNN200 is currently under development.
The single-core computing power of CNN20/CNN100 can reach 1 Tops @ INT8, suitable for low-power AI MCU chips; CNN200 can achieve a single-core computing power of 10 Tops @ INT8, suitable for various edge computing AI SoC chips, and can be widely applied in numerous AI application scenarios, including robotic dogs. Additionally, the company is collaborating with Longqing Technology to develop the NPU IP core CNN300 for AI PC applications. CNN300 combines scalar and vector operation units, utilizing dedicated reconfigurable programmable technology to form a general-purpose programmable AI accelerator, with single-core performance reaching 8 TOPS. CNN300 features a multi-core consistent interface (MLS), supporting the expansion of multiple CNN300 IP cores to achieve higher computing power, ensuring synchronization and unity of data flow in multi-core scenarios, such as achieving 32 TOPS computing power through a four-core stack.
The company is also collaborating with the Shanghai Tsinghua International Innovation Center to develop a GPGPU core based on the open-source RISC-V instruction architecture. By July 2024, the company has completed the first version of the RTL code design and publicly released it. As the company focuses on the research and design of automotive electronic chips, server and cloud application security chips, quantum security chips, and AI MCU chips, the current phase of RISC-V GPGPU research and development has concluded. The company will consider new R&D plans based on the further development of open-source RISC-V GPGPU technology internationally.
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