Due to the shortage and price increase of NAND Flash in 2016 and the first half of 2017, the demand in markets such as smartphones and SSDs weakened in the second half of 2017, exacerbated by the seasonal effects at the end of the year. At the beginning of 2018, the prices of NAND Flash-related … Read more
Click the blue “Go Language Chinese Network” above to follow, and learn Go together every day 1. What is the TEA Encryption Algorithm TEA (Tiny Encryption Algorithm) is a simple and efficient encryption algorithm, known for its fast encryption and decryption speed and simple and efficient implementation. This article contains a lot of code; if … Read more
Researchers from KU Leuven have proposed an efficient key recovery attack method against the SIDH protocol, capable of breaking the SIKE post-quantum cryptographic algorithm using a standard single-core CPU in just one hour. The key encapsulation mechanism is a protocol that securely exchanges symmetric keys using asymmetric cryptographic techniques. SIKE (Supersingular Isogeny Key Encapsulation) is … Read more
Li, J., Zhong, P., Yang, M., Zhu, F., Chen, J., Xu, B., Liu, W. (2019). Dynamic and Intelligent Modeling Methods for Joint Operation of a Flood Control System. Journal of Water Resources Planning and Management. 145, 0401904410. https://doi.org/10.1061/(ASCE)WR.1943-5452.0001110 Li, J., Zhong, P., Yang, M., Zhu, F., Chen, J., Liu, W., Xu, S. (2020). Intelligent identification … Read more
With the increase in device density and clock frequency of chips under advanced processes, power consumption has also significantly increased. At the same time, the supply voltage and transistor threshold voltage have been reduced, leading to significant leakage current. High power consumption can cause excessive temperature during device operation, reducing reliability due to electromigration and … Read more
This article was originally published in the Zhihu column [The Path of Digital IC Backend Engineers]. Multi-bit cells have been widely used in numerous chip designs as a means to control power consumption, and various EDA tools provide extensive and comprehensive support for them. Today, we will start with the basic structure and principles of … Read more
Leakage power consumption has increased with each generation of CMOS technology. This leakage power not only poses a serious challenge for battery-powered or portable products but is also becoming an issue that wired devices such as servers, routers, and set-top boxes must address. To reduce the total leakage power consumption of chips, it is best … Read more
State Retention and Restoration Methods Continuing from the previous text Low Power Design Methods – Power Gating Design (Part 1) Low Power Design Methods – Power Gating Design (Part 2) Given the power switch structure and isolation strategy, power gating can be applied to logic blocks. However, unless a retention strategy is employed, all state … Read more
The technologies discussed in the previous chapter are mature. Engineers have been using them for some time, and design tools have supported them for many years. In this chapter, we begin to discuss more recent and proactive methods to reduce power: power gating and adaptive voltage scaling, these two techniques. Both of these techniques differ … Read more
Low Power Design Methods – Frequency and Voltage Scaling The practical operational space of circuit design lies in the process, design goals, process libraries, and timing analysis methods. Under special processes, temperature inversion particularly limits the range of timing, voltage, and temperature to maintain their normal monotonic relationship. A detailed analysis of all these factors … Read more