16862A 68-Channel Portable Logic Analyzer

16862A 68-Channel Portable Logic Analyzer

“Deeply cultivate the market, pursue excellence” XINLITONG 16862A 68-Channel Portable Logic Analyzer Suzhou Xinlitong Overview 68-Channel Portable Logic Analyzer The 16862A Portable Logic Analyzer provides faster deep memory timing capture capabilities, helping you complete digital debugging more quickly. Features Logic Analyzer Configuration Standard 68 channels, 350 MHz state, 12.5 GHz timing scaling, 2.5 GHz timing, … Read more

Fundamental Concepts of Xilinx FPGA

Fundamental Concepts of Xilinx FPGA

InXilinx FPGA, the Site is the smallest configurable unit in the physical layout of the chip, representing the specific location of hardware resources. 1. Definition and Function of Site Physical Level: A Site is the smallest independently configurable unit on an FPGA chip, with each Site corresponding to a fixed physical location, containing specific resources … Read more

Low Power Design Methods – Multi-Voltage Domain Design (Part II)

Low Power Design Methods - Multi-Voltage Domain Design (Part II)

Level ShiftersLevel shifters – converting voltage from low to high Driving logic signals from a low power rail to a high voltage rail is a critical issue. Under-driven signals can lead to degraded rise and fall times at the receiving end. This, in turn, can result in higher switching short-circuit currents and reduced noise margins. … Read more

How to Avoid Latch Generation in FPGA Design

How to Avoid Latch Generation in FPGA Design

During the process of FPGA design, it is common to encounter warnings during compilation indicating that some latches have been generated. Generally, the design rules for FPGAs also advise against the generation of latches. So, what exactly is a latch? And how can we avoid the occurrence of latches in FPGA design?1 Comparison of Latches, … Read more

Low Power Design Methods – Multi-Voltage Domain Design (Part 1)

Low Power Design Methods - Multi-Voltage Domain Design (Part 1)

The technologies discussed in the previous chapter are mature. Engineers have been using them for some time, and design tools have supported them for many years. In this chapter, we begin to discuss more recent and proactive methods to reduce power: power gating and adaptive voltage scaling, these two techniques. Both of these techniques differ … Read more