Essential Insights on SoC Functional Verification

Essential Insights on SoC Functional Verification

As the design progresses and approaches the final product, the cost of correcting a design flaw becomes increasingly high. Cost of correcting design flaws at different design stages 1. Overview of Functional Verification In the field of IC design and manufacturing, the terms verification and testing refer to two different processes. Verification Confirming the correctness … Read more

Core Enterprises in 13 Major Sub-industries of the IC Industry Chain

Core Enterprises in 13 Major Sub-industries of the IC Industry Chain

Domestic IC Industry Chain IC Design Companies: HiSilicon, ZTE Microelectronics, Unisoc, Allwinner Technology, BGI Semiconductor, Datang Semiconductor, Zhixin Microelectronics, Silan Microelectronics, Guowei Technology, Zhongxing Microelectronics, Unigroup Guoxin, Guomin Technology, Obit, Zhongying Electronics, Lattice Semiconductor, Beidou Star, Beijing Junzheng, Zhaoyi Innovation, Geke Microelectronics, China Electronics, Weier Semiconductor, Tongchuang Guoxin, Fudan Microelectronics, Aipai Microelectronics, Goodix Technology, MediaTek, … Read more

Detailed Process of Digital IC Design (ASIC Design)

Detailed Process of Digital IC Design (ASIC Design)

Click the “Read Original” at the bottom of the article to watch selected IC design courses for free! ASIC Design Process 1. Define Project Requirements 1. Determine the specific indicators of the chip: Physical Implementation Manufacturing process (foundry and process size); Die area (DIE size, affected by power consumption, cost, digital/analog area); Packaging (larger packaging … Read more

PMIC Seminar – High Frequency DC-DC Converters

PMIC Seminar - High Frequency DC-DC Converters

PMIC Seminar The seminar is a regular activity of the Power and Mixed-Signal Integrated Circuit Laboratory, held once a month, hosted by the heads of various research directions in the lab, aimed at enhancing communication and integration among research groups, sharing cutting-edge research dynamics, and summarizing stage achievements. In the last seminar, Senior Brother Yuan … Read more

JTAG Instruction Register and Instruction Decoder

JTAG Instruction Register and Instruction Decoder

Instruction Register (IR) 指令寄存器 The purpose of the Instruction Register (IR) is to shift in instructions via the TDI signal. Additionally, the instruction register can hold the current instruction until the new instruction is completely shifted in. Generally, an IR consists of two registers as shown in Figure 1. The Hold register stores the previous … Read more

Using Makefile Scripts for VCS and Verdi

Using Makefile Scripts for VCS and Verdi

Introduction: Makefile scripting language greatly enhances productivity, allowing us to focus more on the design itself. This article introduces the Makefile scripts for commonly used VCS and Verdi software in IC design/verification, along with the source code, hoping to be of help to everyone. If you don’t have the relevant operating environment, try replying hidden … Read more

Nine Key Techniques for Low-Power Processor Design

Nine Key Techniques for Low-Power Processor Design

Low-power mechanisms are crucial for processors. This article provides an overview of low-power technologies for processors. For processors, while we pay great attention to their clock frequency and performance, one undeniable fact is that processors spend the vast majority of their time in standby or sleep mode. For example, the smartphones we use daily are … Read more

Low Power Design Techniques for Integrated Circuits

Low Power Design Techniques for Integrated Circuits

~ Reply the following keywords to see more IC design tutorials ~ Currently supportedkeywords include: Innovus ICC or IC Compiler DC or Design Compiler PT or PrimeTime User Guide or UG Leda VCS Formality Process Node Low Power CTS vim or gvim … Low power design has always been an important aspect of digital IC … Read more

Power Consumption Challenges and Low-Power Design in Chip Design

Power Consumption Challenges and Low-Power Design in Chip Design

In the early stages of IC design, the main parameters of concern were performance (timing) and area. EDA tools minimized area while meeting performance requirements. At this time, power consumption was not a major concern. Because CMOS technology exhibits relatively low power consumption at lower clock frequencies, leakage current can be negligible. However, as transistor … Read more

Low Power Design Strategies – Resource Sharing

Low Power Design Strategies - Resource Sharing

Scan the QR code with WeChat or search for “Digital Integrated Circuit Design and EDA Tutorial” to follow our official account, surprises await you ^_^ This section introduces resource sharing in low power design strategies. Applying this method in code design can reduce system area and power consumption. Of course, some logic synthesis tools may … Read more