Powerful JTAG Boundary Scan 3 – Common Boundary Scan Test Software

The previous two articles introduced the basic principles of boundary scan and BSDL files. This article introduces two software tools commonly used for boundary scan testing. In the practical application section, we will demonstrate boundary scan testing applications based on STM32 and FPGA.
This article introduces two commonly used boundary scan testing software: XJTAG and TopJTAG. The former is paid and powerful, while the latter is free (after harmonization) and simple.
If you only need to perform simple boundary scan tests, the latter is sufficient. This article focuses on the latter, specifically the download, installation, and basic usage of TopJTAG.

1. Powerful XJTAG

XJTAG is a complete system designed and developed by graduates of the University of Cambridge, including JTAG debugger hardware and host software. It is powerful and expensive.
Official website:<span>www.xjtag.com/zh-hans/</span>
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Taking one of the JTAG controllers, XJLink2, as an example, its features are as follows:

  • Supports up to 4 TAP interfaces

  • TCK can reach up to 166MHz

  • JTAG signal voltage can be configured, ranging from 1.1 to 3.3V in 0.1V steps

  • All IO pins have built-in voltage measurement and frequency measurement functions

  • Open DLL API interface

Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Currently, there are two authorized agents for XJTAG in China: Guangzhou Fengbiao Electronics and Yantai Changyun Electronics. Friends in need can contact these two agents.

2. Compact and Simple TopJTAG

Another commonly used boundary scan software is TopJTAG Probe, developed by TopJTAG. It can work with common emulators such as J-Link and USB-Blaster, along with Top JTAG Probe software to perform boundary scan tests. The interface is simple and easy to use, sufficient for our routine simple testing compared to professional boundary scan software like XJTAG.
Official website:<span>http://www.topjtag.com/</span>
TopJTAG currently has two tools:

  • TopJTAG Probe: Boundary scan testing software that can read, control IO, display waveforms, count pulses, etc.

  • TopJTAG Flash Programmer: Can program and read the externally connected CFI Flash chip.

3. Installing TopJTAG

The TopJTAG software installation package (including both Probe and Flash tools) can be obtained by replying with the keyword Boundary Scan in the background of the official account to get the installation package and the download link for the harmonization tool.

4. Basic Usage of TopJTAG

Here, we take the Xilinx Kintex-7 XC7K325T development board, along with the JLink V9 debugger, as an example to demonstrate the basic usage of TopJTAG Probe.
First, connect the FPGA and JLink debugger hardware as shown in the figure below.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Ensure that JLink is correctly identified in the device manager.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Open the TopJTAG Probe software, create a new connection, select the debugger as JLink, and set the TCK clock to the maximum of 12MHz. You can see that it supports many JTAG debuggers.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
If JLink and FPGA are correctly connected, the current chip manufacturer and IDCODE will pop up.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Specify the path of the BSDL file and verify it.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
For information on how to obtain the BSDL file, you can refer to the previous article:

  • Powerful JTAG Boundary Scan (2): Introduction to BSDL Files.

If the verification is successful, the following chip view will pop up, showing the status of each pin.
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
Click RUN to start the boundary scan, which defaults to SAMPLE mode. Blue indicates that the pin is currently low, red indicates that the pin is currently high, and black indicates power pins (VCC/GND).
Powerful JTAG Boundary Scan 3 - Common Boundary Scan Test Software
This concludes the introduction to the installation and basic usage of TopJTAG. In the following articles, I will use MCU STM32 and FPGA XC7K325T as examples to demonstrate the detailed use of TopJTAG, providing an intuitive understanding of how boundary scanning works and several application scenarios for boundary scanning.
The TopJTAG software installation package (including Probe and Flash tools) can be obtained by replying with the keyword Boundary Scan in the background of the official account to get the installation package and the download link for the harmonization tool.

More Selections

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  • Powerful JTAG Boundary Scan 2 – Introduction to BSDL Files

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  • Using JLink and OpenOCD to Download Xilinx FPGA Programs

  • 4 Methods to Obtain Xilinx FPGA Chip IDCODE (Supports Any FPGA Model)

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  • Xilinx FPGA Multiboot Design and Implementation (Examples of Spartan-6 and Kintex-7)

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