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JTAG is an IEEE standard (1149.1) developed in the 1980s to solve electronic board manufacturing issues. Nowadays, it can be used for programming, debugging, and probing ports. But first, let’s look at the original use of JTAG, boundary testing.
Boundary Testing
This is a simple electronic board (also known as a “Printed Circuit Board” or “PCB”), with two ICs (“Integrated Circuits”), a CPU, and an FPGA. A typical circuit board may have more ICs.
ICs can have many pins. Therefore, of course, ICs are connected together through a multitude of connections (PCB traces).Only four are shown here. But it’s easy to place thousands on a PCB.
Now, if you build a thousand boards, each with thousands of connections, it’s inevitable that some boards will be faulty. How do you test all these boards? You must ensure that all these connections are correct. You cannot just manually test all these connections. This is where JTAG was created.
JTAG can control (or hijack) the pins of all ICs. In the image, perhaps JTAG will make all CPU pins output and all FPGA pins input. Then, by sending some data from the CPU pins and reading values from the FPGA pins, JTAG can ensure the circuit board connections are good.
Now, JTAG actually consists of four logic signals: TDI, TDO, TMS, and TCK. From the perspective of the PC, this is three outputs and one input.
◇TCK: Clock signal, providing an independent, basic clock signal for TAP operations.
◇TMS: Mode select signal, used to control the transitions of the TAP state machine.
◇TDI: Data input signal.
◇TDO: Data output signal.
These four signals need to be wired in a specific way. First, TMS and TCK are connected in parallel with all JTAG ICs.
Then connect TDI and TDO together, forming a chain. In JTAG terminology, you will often hear about the origin of the term “JTAG-chain”.
As you can see, each JTAG-compliant IC has four pins for JTAG (three inputs and one output). The fifth pin, named TRST, is optional (JTAG reset). JTAG pins are usually dedicated (not shared for other purposes).
All large ICs use boundary testing done via JTAG – boundary testing was the original reason for creating JTAG. Nowadays, the use of JTAG has expanded to allow operations such as configuring FPGAs, and then using JTAG for debugging inside the FPGA core.
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