Adaptive Computing Accelerates Software-Defined Hardware Era

Adaptive Computing Accelerates Software-Defined Hardware Era

In the past, designing a product required careful planning of the hardware architecture, and only after the hardware design was completed would software development begin, followed by the release of the complete product. Now, with the development of cloud computing and the internet, along with the rise of AI, 5G, and autonomous driving, the development … Read more

How to Build a Linux Image Using Yocto

How to Build a Linux Image Using Yocto

Author: Zhang Longley, AMD Engineer, Source: AMD Developer Community All FPGA SoC devices from AMD XILINX (Zynq-7000, Zynq MPSoC, Versal) and soft cores (Microblaze) support building Linux images using Yocto. This blog demonstrates how to build a Linux image using Yocto. The blog uses version 2024.1 of the tools to quickly build a Linux image … Read more

Three Reasons to Switch from Yocto to PetaLinux

Three Reasons to Switch from Yocto to PetaLinux

Introduction At DesignLinx Hardware Solutions, we use PetaLinux to build custom Linux images to support our clients’ tailored products. I must admit, I was skeptical when I first heard about PetaLinux. My professional background is in embedded Linux, having worked on numerous projects that included pure Yocto/Bitbake/OE and integrating Linux on various SoC platforms. Yocto … Read more

Practical Differences and Application Strategies of HDL in FPGA and ASIC Design

Practical Differences and Application Strategies of HDL in FPGA and ASIC Design

Hardware Description Language (HDL) is the cornerstone of modern digital system design, used as the core tool to describe hardware behavior and structure in both Field Programmable Gate Arrays (FPGA) and Application-Specific Integrated Circuits (ASIC). However, the fundamental differences in implementation, design processes, and target applications between FPGA and ASIC lead to significant differences in … Read more

The Four Essential Tools of ASIC Design

The Four Essential Tools of ASIC Design

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the best and largest pure FPGA engineer community in China. In today’s article, I will share with you the “Four Essential Tools” of ASIC design: Fold, Expand, Retiming, and Resource Sharing. Fold & Expand Fold & … Read more

Software Defined Radio (SDR) – Gateway Design for Industrial IoT

Software Defined Radio (SDR) - Gateway Design for Industrial IoT

Software Defined Radio hardware and open-source programming software provide an alternative to proprietary wireless communication systems, helping to enhance the interoperability of Industrial Internet of Things networks. Despite much discussion about how the Industrial Internet of Things (IIoT) will transform factory automation, there is no unified technology to connect various ‘things,’ leading to incompatibility between … Read more

Debugging FPGA with Internal Logic Analyzers

Debugging FPGA with Internal Logic Analyzers

Click the blue text to follow us Follow and star our public account for exciting content delivered daily Source: Online Materials 1 Reasons for Changing FPGA Debugging Technology During the functional debugging of hardware design, the reprogrammability of FPGAs is a key advantage. In the early use of CPLDs and FPGAs, if a design was … Read more

Building a Logic Analyzer Using FPGA

Building a Logic Analyzer Using FPGA

Previously, we introduced how to create a logic analyzer and oscilloscope using RP2040. Today, we will build a logic analyzer using FPGA. Currently, the mainstream architecture of logic analyzers in China is based on FPGA + USB PHY. The combination of the advantages of FPGA and the high accessibility of USB has kept it in … Read more

Open Source Logic Analyzer – DSLogic

Open Source Logic Analyzer - DSLogic

Whether you are developing microcontrollers or FPGAs, a protocol analysis tool – the logic analyzer, is often used. Unlike oscilloscopes, it can only collect digital signals, with sampling rates typically ranging from hundreds of MHz to GHz, supporting multiple channels for simultaneous sampling. The accompanying software supports parsing dozens of protocols such as I2C, UART, … Read more

FPGA Signal Tap Logic Analyzer Tutorial

FPGA Signal Tap Logic Analyzer Tutorial

Greetings, heroes! Welcome to the FPGA technology realm. This vast world offers us the chance to meet by fate. You can follow the FPGA technology community to discover other resources of interest in the “Adventuring” and “Heroic Deeds” sections, or simply enjoy a drink and chat. This series will provide a systematic study of FPGA, … Read more