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Due to setbacks in data centers, FPGAs have been relatively quiet in recent years. However, FPGAs have now found new applications in fields such as artificial intelligence, high-speed wireless communication, medical and life sciences technology, and complex chip architectures, where they can improve data flow.
Field Programmable Gate Arrays (FPGAs) allow designers to reprogram or reconfigure digital logic after chip deployment, which is crucial in the field of artificial intelligence, as the speed of algorithm updates far exceeds that of chip architecture updates. FPGAs have lower upfront costs, making them suitable as prototyping tools for fixed-function chips like Application-Specific Integrated Circuits (ASICs) or as temporary solutions before workload determination. However, due to their higher manufacturing costs, FPGAs are typically used in small-batch, high-performance special applications, such as fighter jets or laboratory measurement equipment.
Nevertheless, the FPGA market continues to expand. New application areas include:
1. Cloud-based servers capable of offloading complex algorithms from data centers to medical and scientific applications involving 3D mathematics;
2. Low-cost virtual hardware verification through hybrid prototyping systems;
3. Mitigating memory and I/O bottlenecks in SoCs and NoCs;
4. Development of 5G/6G chips for base stations and core network devices;
5. Providing customized hardware functions through horizontal product differentiation;
6. Adapting to changes in security regulations and threats.
Major bulk users of high-end FPGAs include telecommunications companies (wireless and wired), data centers, networks, as well as military, aerospace, and government sectors. “The annual usage in these application areas ranges from thousands to hundreds of thousands of units,” said Venkat Yadavalli, head of Altera’s business management group. “In terms of applications, FPGAs integrate more functions, such as embedded Arm cores and AI tensor modules, which increases their usage in a broader range of embedded and edge AI applications.”
Robotics is a rapidly growing field that requires deterministic latency and utilizes heterogeneous data from cameras and sensors for real-time decision-making at the edge. “It can be voice, video, or any data that requires sensor fusion,” Yadavalli said.
Another significant application area is medical imaging technology, ranging from optometrists scanning retinas to MRI systems. “You need to process raw analog data, filter it, process it, and use it to reconstruct images, which involves a lot of matrix calculations,” said Rob Bauer, senior manager of marketing for AMD’s adaptive and embedded products. “FPGAs excel in this regard. AI engines are very good at matrix calculations, making them ideal for this type of volumetric imaging application.”
In today’s rapidly changing, highly interconnected, and AI-powered environment, there is no one-size-fits-all answer for designers on whether to use FPGAs, ASICs, or other types of ICs.
Andy Nightingale, vice president of product management and marketing at Arteris, stated, “You don’t just switch between two solutions at will. What you have is a combination or fusion of multiple solutions. Interconnect technology facilitates and supports the hybrid application of FPGAs, such as for network security or mitigating I/O bottlenecks. FPGAs can be used for prototyping, but customers may retain some FPGAs in their systems, saying, ‘We want to use custom hardware in the SoC, but we will keep some FPGA technology because the benefits outweigh the time required for custom hardware, even if we eventually find that specifications or standards have changed.’ If security standards change, they must reimplement and process, and FPGAs may contain reprogrammable content. Even if there is a slight overhead in power consumption, it may not be on the critical path, so this issue can be circumvented.”
When weighing various options, it is helpful to consider the cost of each logic unit in an FPGA. “Compared to ASICs, you need some architectural design to achieve cost-effectiveness,” Yadavalli said. “You will always be slightly at a disadvantage compared to ASICs or ASSPs because their functions are fixed, carefully designed, and optimized to implement only what you need, rather than allowing you to create all the programmability yourself. In this case, you will incur some additional overhead in implementing Ethernet or PCIe. You can switch all these functions. You need all these circuits, which adds to the cost. Ultimately, it depends on the return on investment and whether the market has stabilized to the point where you need ASICs.”
This is about making trade-offs in design to solve specific problems. “If you look at FPGA users, you will find they are trying to accomplish increasingly complex tasks,” Bauer said. “In the field of physical AI, people are trying to integrate AI into edge systems, acquiring data from sensors and processing it immediately with very low latency. Data rates are continuously increasing, and security requirements are also rising. This is an optimization problem.”
Evolving Algorithms
AI/ML models are a moving target; while FPGAs can be reprogrammed to match them, selecting the best chip is a cyclical process as conditions change.
“If workloads change frequently, then I need general-purpose computing,” said Mo Faisal, CEO of Movellus. “I can optimize more and push its performance to the limit. But eventually, you realize that ‘this highly flexible general-purpose computing is no longer valuable. I need to customize. We are in a cycle where my problem statement changes so much that I might gain more by adopting reprogrammable computing.’ Ultimately, we will exhaust this potential and return to the development history of ASICs and FPGAs. Of course, you can develop specific algorithms tailored for FPGAs. For example, if you want to talk about the scale of particle accelerators, they use 10,000 FPGAs to process data output at a specific rate. But if you want to implement this on a large scale, currently only CERN and Fermilab can do it. If you want 10,000 FPGAs, you need to rethink FPGAs.”
Others also believe this requires a case-by-case analysis. “Whether to use programmable FPGAs depends on the type of workload you are facing, and software development as well,” said Kexun Zhang, research director at ChipAgents. “Researchers in the life sciences are designing different model architectures. I see that some fields and directions of model architecture exploration are far from being consistent, which is why people still need compilers and hardware to run their custom model architectures at reasonable speeds. And FPGAs shine in these areas.”
For consumer markets and other mass markets, the cost and efficiency structure is not reasonable. “In data centers, prototyping or very specific AI changes may benefit from it,” said Nandan Nayampally, chief business officer of Baya Systems. “For example, if you are involved in high-frequency trading, algorithms change regularly, so optimization is needed. If I do not have enough business volume or costs to support ASICs, I may stick with FPGAs. Many new AI architectures adopt programmable components and programmable engines integrated on the same chip or across multiple chips, which improves efficiency while maintaining flexibility.”
On FPGAs, as long as resources allow, you can build as many hardwired parallel computing units as possible based on the scale of the FPGA. “Compared to general-purpose GPU cores, FPGAs can be customized for your application,” Nightingale said, “and you can also customize the parallelism.”
Virtual FPGA Machines for Complex Algorithms and Verification
Cloud-based FPGAs can also be used to offload compute-intensive workloads from data centers, for example, by using Amazon Web Services EC2 virtual servers. “You can access AWS and configure a virtual machine,” said Russell Klein, project director at Siemens EDA. “This is a physical machine equipped with what is called an F2 instance. It has a PCIe card with eight Xilinx FPGAs, all of which can be programmed via the PCIe bus to the main processor. I have been working with them to utilize our advanced synthesis tools to program these F1 instances and tell them: ‘Here is a function, let’s push it to the FPGA architecture via the PCIe bus.’ We just implemented this functionality, and I can take a function, compile it using our advanced synthesis tools, and then interact with the software running on the processor through Xilinx tools.”
Additionally, F2 instances are also used to offload very complex algorithms. “They mainly see this application in the life sciences—people involved in DNA analysis or chemical reaction analysis need to handle very complex 3D mathematical operations, and they are responsible for programming the FPGAs and getting them to interact with the processors running on the host,” Klein said. “They can connect all these devices via PCIe to accelerate these very complex algorithms. We will see widespread adoption of this application in the AI field because it is faster and consumes less power. This is clearly the next step in building faster and more efficient inference and training environments. This capability is already in place, and we need the entire industry to start leveraging it.”
Another application scenario for F2 instances is low-cost hardware verification. “When SiFive was just established, they needed to boot an operating system on RISC-V designs to manufacture chips,” Klein said. “They wanted to use this as a verification step. They did not purchase FPGA prototyping systems but instead rented FPGA boards on AWS for $6 per hour. They could integrate a CPU instance into a chip and then program multiple FPGAs and multiple boards to run multi-CPU, multi-core designs. They built their low-cost simulator using these data center CPUs. AWS was very interested in this and developed related tools to utilize the FPGA architecture in the system for logic simulation. They could combine all these functions to run faster. It’s like a hybrid FPGA prototyping system.”
The entire card is connected to a processor on the server. “They would insert multiple such cards into one server, with each card plugged into different PCIe slots, allowing multiple programs to connect to multiple cards,” Klein explained. “You can start and stop it very quickly. These are FPGA cards for data centers that can accelerate hardware verification, biosciences, and AI development. This is a viable technology to address today’s computing challenges.”
Meanwhile, FPGAs are helping to achieve left-shift design. “If you look at the explosive growth of new chip development driven by AI and the costs of advanced process nodes like 2nm, you will find that ensuring design correctness is more important than ever,” Bauer said. “Software engineering teams can use these simulation prototyping platforms to develop corresponding software before the final ASIC chip tape-out.”
Reducing Bottlenecks, Data Preparation
FPGAs can also help reduce memory and I/O bottlenecks in SoCs and chips by optimizing data transfer, saving power in data centers and improving performance.
Altera recently chose Arteris to assist in addressing this issue. “FPGAs can be placed directly in the data path to manage data flow, minimizing buffering and optimizing throughput,” Nightingale said. “By managing data online, FPGAs can preprocess incoming data, reducing the workload on CPUs, GPUs, or other processing units, thereby alleviating the primary bottlenecks in AI system performance. Consequently, the emerging memory and I/O bottlenecks are also reduced.”
This is similar to online processing, where FPGAs are directly embedded into the data stream. “Given the large capacity of these devices today, you can perform more processing on the same batch of data while it flows through,” Nightingale said. “We see FPGA technology permeating the entire data transmission process, closely integrated with data processing.”
In data centers, FPGAs are used as smart network cards with local memory. “You encounter very large mesh topologies that must be able to move data quickly from one point to another,” Bauer said. “The reconfigurable nature of FPGAs, combined with their ultra-fast connectivity, memory capacity, and low latency, makes them very suitable for use alongside AI computing units (whether GPU or ASIC). This allows customers to precisely define where data moves. We place large memory directly next to the computing unit. In AI applications, the proximity of memory and computing units is crucial. This is what high-end applications require.”
On the other hand, very small FPGAs are also used on GPU clusters or server motherboards for board-level orchestration, management, and power sequencing control. “We call this a server I/O type of use case,” Bauer said. “The FPGA on the server controls the various boards, ensuring that all components are powered correctly. Additionally, there are FPGAs responsible for transferring data to memory and communicating between different computing units.”
Another new role for FPGAs is in AI infrastructure, which needs to handle infrastructure data entering GPUs or CPUs. “Once data enters the system, the way these packets are managed is highly programmable,” Yadavalli said. “You need a smarter way to manage network interface cards, smart NIC functions, or some form of data plane management, all of which need to be done before data enters the CPU or GPU. The role of FPGAs is to receive this data and preprocess it in a way that can be utilized by all large GPUs and CPUs in the backend.”
Data preprocessing and cleansing is another emerging area. The effectiveness of AI applications depends on the quality of the data. “You may have the most advanced models or logic layer models (LLMs), but if the data itself is very noisy, whether business data or any commercial data, you will encounter ‘garbage in, garbage out’ situations,” Yadavalli said. “Data preprocessing refers to automatically converting all input information into a standard format. You can input PPTs, voice commands, text, etc. On the other hand, logic layer models can only handle certain specific raw data, which needs special processing to provide optimal information. FPGAs are particularly well-suited for this task, as they can spatially process this diverse input data.”
Wireless Communication Infrastructure
Communication protocols such as 5G, 6G, Open RAN, and baseband applications are significant markets for FPGAs. Altera and BigCat recently collaborated to expand FPGA-based wireless access network technology. “As wireless standards evolve, the deployment cycle in the first four to five years typically uses FPGAs,” Yadavalli of Arteris said. “Since the standards are not yet fully defined, large equipment suppliers like Erickson, Nokia, Samsung, and others worldwide cannot develop ASICs in time. You need to pre-order the entire specification two years in advance to start developing ASICs. Once the specifications are finalized, you need these chips to be on the market in time to transition the network to the next generation of technology.”
AI algorithms are also rapidly evolving in the networking field, presenting opportunities for FPGAs. “In the 6G domain, AI processing technologies related to networks are being widely discussed, but there are currently no standardized solutions, and there are doubts about the deployment timeline for 6G,” Yadavalli said. “Many may fall behind, lead, or go astray in some aspects. They need flexibility in AI computing. Additionally, there are various scales of computers. Some can truly push computing to the baseband, where large cloud platforms have already been built. But many technologies are also deployed on the radio side, as well as baseband devices located under large antennas. All of these require FPGAs as auxiliary components.”
In the 5G field, AMD’s adaptive SoCs have seen a significant increase in usage for beamforming applications. “This is an important part of standard promotion,” Bauer said.
Horizontal Product Differentiation
Vertically integrated companies can integrate specific accelerators or functions into ASICs, but most of the industry operates on a horizontal integration model. A company producing various embedded processors is unlikely to develop fixed accelerator functions, as this would narrow its overall market opportunities.
Klein from Siemens stated, “These companies can integrate embedded FPGA architectures into their devices or enable their SoCs to connect with external FPGAs. We see many manufacturers starting to do this. This can provide customized hardware functions for their systems. Although it is larger and consumes more power than ASIC-level implementations, it is faster and more efficient than software implementations.”
For example, if a company wants a wearable device’s battery to last a week without charging, they must consider offloading some functions from the processor. “If they want to integrate horizontally and do not develop their own SoCs, they will need programmable logic to offload some functions,” Klein explained. “Whether this programmable logic is embedded in the SoC they purchase or used as a standalone component, FPGAs can help them achieve higher performance and lower power consumption.”
Embedded FPGAs can also protect certain intellectual property through sparsity and obfuscation. “Perhaps a software developer or software program has its own secret algorithm,” said Andy Jaros, vice president of IP sales at QuickLogic. “They want a hardware accelerator to go along with it. They develop the algorithm and place it in an eFPGA on an ASIC without sharing it with anyone.”
Security Threats
Although FPGAs can be reprogrammed to address changing regulations and emerging threats (such as the specter of quantum hackers), there are still concerns about new security threats.
“We see the increasing application of FPGAs aimed at ensuring the authenticity of the code running on these systems and preventing tampering,” Bauer said. “Additionally, for online encryption of data, some customers have their proprietary technologies, and programmable logic is very suitable for these technologies. Other customers are satisfied with the standard methods we have already integrated. We have hardware encryption modules for implementing end-to-end online encryption.”
Other application scenarios include wireless or wired connections and firewalls. “People are using FPGAs for AI-based packet detection to look for threats,” Bauer said. “You need high-speed connections, and then you need to integrate the model directly into the network architecture.”
However, there are also some downsides. “Standalone and embedded FPGAs provide great flexibility, but if the confidentiality and integrity management of the bitstream configuration data is not handled properly, especially in shared environments like data centers, this advantage can pose security risks,” said Scott Best, senior director of silicon IP at Rambus. “Similar to the risks faced by data center ASICs and SoCs running semi-independent virtual machines for different users, data center FPGAs also require robust configuration and access controls to prevent unauthorized reprogramming or side-channel attacks when users share programmable architectures.”
Many FPGAs now come with built-in encryption systems. “Measures to protect the bitstream representing FPGA programming have improved. But they remain a prime target for attackers, who attempt to claim they have breached the system by modifying a single bit of the program and transmitting it to the FPGA to run,” said Dana Neustadter, senior director of product management at Synopsys. He noted that attacking FPGAs is similar to technologies like secure boot. “In the processor domain, we use secure boot to ensure the correct program is running on the processor. In the FPGA domain, the same task is accomplished by encryption and authentication engines that verify the FPGA’s programming.”
Conclusion
FPGAs have low upfront costs, so they will continue to serve as prototyping tools, but in today’s high-tech field, they are also taking on an increasing number of new roles. To keep pace with the development of AI and fend off hacker attacks, designers may find that the best solution is to mix fixed-function devices with programmable devices.
(Source: Content compiled from semiengineering)
*Disclaimer: This article is original by the author. The content reflects the author’s personal views, and Semiconductor Industry Observation reprints it only to convey a different perspective, not representing Semiconductor Industry Observation’s endorsement or support of this view. If there are any objections, please contact Semiconductor Industry Observation.
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