The ECS-M.2/FPGA is a newly launched PCI Express® EtherCAT® slave device interface in M.2 specification, fully meeting the needs of compact host systems.
Upgrade Your Embedded System to EtherCAT Slave Device
- • Add EtherCAT slave device (ECS) functionality to your embedded PC.
- • The address space of the EtherCAT slave device controller is directly mapped to the PCI Express address space.
- • Suitable for M.2 specification (2280 or 2260 models) for IPC (Industrial Personal Computer) or small embedded devices like Raspberry Pi.
Simple Configuration, Fast Application Development
- • Easily configure using esd’s EtherCAT master device or other brand master devices.
- • Provides an example of the EtherCAT slave device information file (ESI file, XML format).
- • Includes esd’s EtherCAT slave device API library and quick development example code.
Supports Bus Master
- • This FPGA supports bus master direct memory access (DMA) functionality, which can offload the CPU workload without requiring the CPU to perform copy operations of output process image data to the host memory. This feature can be invoked through esd’s EtherCAT slave device protocol stack.
EtherCAT Slave Device Solution with PCI Express Interface
The ECS-M.2/FPGA is an EtherCAT slave device in M.2 specification. This product is based on Beckhoff IP core and implemented using Altera® FPGA chips, configured with 8 FMMUs (Fieldbus Memory Management Units), 8 Sync Managers, 60 kB dual-port RAM (DPRAM), and 64-bit distributed clocks. The module edge provides two EtherCAT ports (input/output) via an FFC (Flexible Flat Cable) connector and can be connected to an RJ45 interface using the included adapter board.
Flexible Applications
This module supports standard EtherCAT protocols such as CoE (CANopen over EtherCAT), FoE (File Transfer over EtherCAT), and EoE (Ethernet over EtherCAT), allowing the PCI Express host system to act as a flexible EtherCAT I/O node for access by the main device (MainDevice).
Distributed Clock (DC) Synchronization Signals and Latch Signals
To achieve system synchronization, EtherCAT distributed clock (DC) signals (2 synchronization signals, 2 latch I/O signals) are provided in physical I/O form via the adapter board.
Software Support
The delivery includes a binary format of the esd EtherCAT slave device protocol stack, as well as device drivers for Windows® and Linux® systems, along with relevant documentation and application examples. Support for other operating systems, especially real-time operating systems (RTOS), can be provided based on customer requirements.