The Impact of ARM’s Self-Developed Chips on Domestic Chip Companies’ Autonomy and Control

The Impact of ARM's Self-Developed Chips on Domestic Chip Companies' Autonomy and Control

In February 2025, the chip IP provider Arm announced the launch of its first self-developed chip, a news that has caused a strong shock in the global semiconductor industry. As a leading company in the chip architecture field, Arm is transitioning from a traditional IP licensing model to a strategy of self-designed and manufactured chips, … Read more

Breaking the Limitations of Traditional Computing! Understanding SIMD Instruction Set Extensions

Breaking the Limitations of Traditional Computing! Understanding SIMD Instruction Set Extensions

Hello everyone, welcome to my column. In previous articles, we learned about the characteristics, advantages, and implementation details of vector architecture. Today, let’s take a look at another form of data-level parallelism—SIMD instruction set extensions. Table of Content 1. What is SIMD Instruction Set Extension 2. Comparison of SIMD Instruction Set Extension and Vector Architecture … Read more

Domestic Alternatives for Embedded CPUs: Instruction Set × Core × SoC

Domestic Alternatives for Embedded CPUs: Instruction Set × Core × SoC

Central Processing Unit (CPU) The CPU generally consists of a logic unit, a control unit, and registers, serving as thecore of computation and control in a computer. The CPU’s control unit retrieves executable code from memory and converts it into executable instructions, which are then processed by the arithmetic unit. The CPU can be applied … Read more

Review Points and Answers for Embedded System Principles and Applications

Review Points and Answers for Embedded System Principles and Applications

Review Points and Answers for Embedded System Principles and ApplicationsCopy the link to open and save in the browser:https://pan.xunlei.com/s/VOEXWPOwtIhYpjAA6xBazG9IA1?pwd=v4tk# Chapter 3 1. The ARM instruction set includes six types of instructions: branch instructions, data processing instructions, status register access instructions, data access instructions, coprocessor instructions, and exception handling instructions. 3. The ARM instruction set and … Read more

Introduction to the AArch64 Assembly Instruction Set

Introduction to the AArch64 Assembly Instruction Set

1. Development of the ARM Architecture The ARM architecture (Advanced RISC Machine) is a microprocessor architecture based on the principles of Reduced Instruction Set Computing (RISC), originally designed and launched by the British Acorn Computer Company in the late 1980s. The evolution of the ARM architecture is as follows: 1.1. Early Development (1980s-1990s) 1985: Acorn … Read more

Absolutely! Assembly is Here!

Absolutely! Assembly is Here!

Author | cxuan Source | Java Builders Assembly code is a low-level representation of a computer, which is a low-level language that can be understood literally, including data processing, memory management, reading and writing data on storage devices, and utilizing network communication, etc. The compiler generates machine code through a series of transformations that follow … Read more

Control Transfer in ARM Assembly

Control Transfer in ARM Assembly

1. Direct Transfer (Simple Jump) After executing the current instruction, the next instruction is not executed in sequence; instead, it jumps to execute other instructions. ① B Instruction <span>B LABEL</span> This transfers execution to the instruction at the label LABEL (PC) = LABEL Commonly used for branching, for example: B LABEL ; Unconditional jump to … Read more

System Practice Learning ARMv8 Assembly – Course 2

System Practice Learning ARMv8 Assembly - Course 2

Course 2: Stage 1 – Basic Preparation (Week 2) Topic: Detailed Explanation of ARMv8 Registers and Instruction Set, Bare-Metal Programming Practice 2.1 In-Depth Analysis of Registers Classification of ARMv8 Registers: General Purpose Registers (31): <span>X0</span>: Function Argument 1 / Return Value. <span>X1-X7</span>: Function Arguments 2-8. <span>X8</span>: System Call Number. <span>X29</span>: Frame Pointer (FP). <span>X30</span>: Link … Read more

CCCF: Bao Yungang | Perspectives on RISC-V as India’s National Instruction Set

CCCF: Bao Yungang | Perspectives on RISC-V as India's National Instruction Set

Click above to easily subscribe to “China Computer Federation“! Source: “China Computer Federation Communications” 2018 Issue 1 “Column” The processor instruction set is the interface between hardware and software, serving as the cornerstone of the core hardware and software ecosystem, and its importance is self-evident. In 2011, the University of California, Berkeley, released the open … Read more