Connecting MSP430 JTAG (USB and Parallel) to Target Board

Connecting MSP430 JTAG (USB and Parallel) to Target Board

It is common to see beginners of MSP430 asking questions about connecting MSP430 JTAG to the target board in forums. Here, I summarize the information to help new MSP430 learners clear their doubts. The JTAG connection of MSP430 mainly has two methods: the 4-wire JTAG method (including TDO, TDI, TMS, TCK four standard JTAG signals) … Read more

JTAG Download Method Summary for Altera FPGA with Nios II Core

JTAG Download Method Summary for Altera FPGA with Nios II Core

1. For Altera FPGA, when using Nios II, there are four types of files that need to be downloaded: .sof file, .pof file, .jic file, and .elf file. 2. The .sof file and .pof file are usually referred to as FPGA “hardware” or “firmware” files, generated by design compilation in Quartus II. The source file … Read more

Simplified Method for JTAG Interface in STM32 JLINK Programming

Simplified method for using JLINK to download programs to STM32 via JTAG interface (SW and JTAG modes)! Anyone who has used STM32 knows that there are two common methods for downloading programs: via serial port and JLINK. The serial port download method is quite similar to that of the 51, so I won’t elaborate on … Read more

Definition and Meaning of JTAG Interface Pins

Definition and Meaning of JTAG Interface Pins

JTAG has 10-pin, 14-pin, and 20-pin configurations. Although the number of pins and their arrangement differ, some pins are the same across these configurations. The definitions of each pin are as follows. 1. Pin Definitions Test Clock Input (TCK) —– Required 1 TCK is mandated in the IEEE1149.1 standard. TCK provides an independent, basic clock … Read more

How to Determine the Quality of JTAG in FPGA Design?

How to Determine the Quality of JTAG in FPGA Design?

FPGA (Field Programmable Gate Array) as a programmable logic device has been widely used in various digital system designs, and the JTAG interface is one of the most commonly used debugging/programming interfaces. Its quality directly affects the performance and reliability of the FPGA. Therefore, it is essential to diagnose and test the JTAG to prevent … Read more

Speeding Up JTAG Cable Download: Try This Method!

Speeding Up JTAG Cable Download: Try This Method!

In embedded development and chip debugging, the JTAG interface allows developers to access the internal registers of chips through boundary scan technology, making it one of the important tools. However, when using the JTAG cable for program downloads, you may feel that the download speed is too slow. So how can we improve its speed? … Read more

Discussion on DSP Connection Issues with CCS

Discussion on DSP Connection Issues with CCS

Environment Operating System: Win7, 64bit IDE: CCS V3.3 Debugger: SEED XDS510PLUS DSP Model: TMS320C6713GDP(DSP6713) Check Steps Try pressing the reset button and then click Connect. Please check if the power supply is normal (core voltage should be 1.2V, IO port voltage should be stable at 3.3V). Use an oscilloscope to check the ripple of the … Read more

A Method for Debugging Multiple DSPs Using the HPI Interface

A Method for Debugging Multiple DSPs Using the HPI Interface

The software development of DSP systems usually includes the simulation phase and the emulation phase. Simulation begins at the initial stage of design, requiring no hardware support; it can be performed using a software simulator on a computer to achieve preliminary debugging of the code. Emulation involves downloading the code to the target board for … Read more

Solution for No Cortex-M Device Found in JTAG Chain

Solution for No Cortex-M Device Found in JTAG Chain

Today I flashed a firmware, and it ran normally. However, when I tried to flash another firmware, I encountered this issue: No Cortex-M Device found in JTAG chain.Please check the JTAG cable and the connected devices. I found the answer on Baidu, which indicated that treating the JTAG pins as I/O pins would cause the … Read more