JTAG Debugging – TAP Controller

JTAG Debugging - TAP Controller

Implementing the TAP controller within the SoC, interfacing with the JTAG chip in the JTAG hardware box to receive and process JTAG sequences. Its main structure is as follows:As can be seen, there is a state machine, an Instruction Register (IR), several Data Registers (DR), a Bypass Register, etc.The state machine is controlled by TMS, … Read more

JTAG Debugging – Hardware Box

JTAG Debugging - Hardware Box

The JTAG debugging hardware box commonly includes Lauderbatch and ARM’s DStreamer, with prices for licenses ranging from thousands of dollars: A more affordable option is the Flyswatter, priced at a few hundred dollars. Let’s discuss further: Inside the box is actually a USB to serial FTDI FT2232 chip. After connecting to the PC via USB, … Read more

JTAG Debugging Standards

JTAG Debugging Standards

Industry Guiding Standards: Standard Usage and Reference Situations IEEE1149 The JTAG series standard, primarily 1149.1, allows scanning of the JTAG chain on SoCs via the TAP (Test Access Port) interface, enabling command sending and data reading. ARM CoreSight A standardized debug and trace architecture for SoCs defined by ARM. The DAP (Debug Access Port) interface … Read more

Research on Fault Injection and Detection Methods for Aero-Engine Electronic Controllers Based on Boundary Scan

Research on Fault Injection and Detection Methods for Aero-Engine Electronic Controllers Based on Boundary Scan

Research on Fault Injection and Detection Methods for Aero-Engine Electronic Controllers Based on Boundary Scan Wang Yao, Wen Tiedun, Chen Yaping, Zhang Tianhong Nanjing University of Aeronautics and Astronautics, School of Energy and Power Engineering Abstract: The aero-engine electronic controller is a complex circuit system designed around numerous large-scale integrated circuits. Traditional contact-based fault injection … Read more

Q&A with Experts: Unable to Program QSPI Flash in Original Mode During JTAG Boot

Q&A with Experts: Unable to Program QSPI Flash in Original Mode During JTAG Boot

Problem Description In the Zynq 1.0 version chip, I attempted to program (erase/write/read) the QSPI in the original mode, but the code hangs when booting in JTAG mode. Solution When the QSPI flash is in the original mode, MIO[5] is connected to the HOLD signal. To ensure that the HOLD signal is not held low … Read more

Mastering JTAG Tools: Using JTAG Probe to “Reverse Engineer” Hardware Circuits

Mastering JTAG Tools: Using JTAG Probe to "Reverse Engineer" Hardware Circuits

On various second-hand websites, you can often find boards that lack accompanying documentation (such as schematics), and these boards are relatively inexpensive. If purchased in bulk, they can be used as development boards. The first challenge is to “reverse engineer” the schematics for subsequent routine development. Currently, there are two software tools that can assist … Read more

What Are the Differences Between Expensive and Cheap MCU Debuggers?

What Are the Differences Between Expensive and Cheap MCU Debuggers?

Click on the aboveblue text to follow us MCU debuggers play an important role in embedded development. The price difference is usually determined by multiple factors such as functionality, compatibility, performance, and support services. 1 Basic Functionality and Protocol Support for SWD The two-wire debugging protocol (SWDIO and SWCLK) commonly used for ARM Cortex-M series … Read more

Reasons for Differences in Chip Programming Efficiency

Reasons for Differences in Chip Programming Efficiency

Abstract Chip programming is an important part of the production process of electronic products, and the efficiency of programming is a key concern for customers. The efficiency of programming is closely related to the programming speed of the chip. What factors influence the programming speed of chips? 1. Different Manufacturers’ Chips The differences between chip … Read more

IJTAG Single-Layer Network Testing Method Based on IEEE Standards

IJTAG Single-Layer Network Testing Method Based on IEEE Standards

Huang Xin, Song Boyuan, Guo Xiaomin, Lin Jieqin (Guilin University of Electronic Technology, School of Electronic Engineering and Automation, Guilin, Guangxi 541000) Abstract: In order to utilize the traditional JTAG interface for testing and controlling a large number of specific IP testing instruments within the SOC, a universal and portable single-layer network testing method based … Read more

Strange Errors in Vivado SDK During JTAG Mode

Strange Errors in Vivado SDK During JTAG Mode

Problem Description After downloading the elf file, a message box pops up as shown in Figure 1, indicating that there is a problem with the software operation. However, the software runs correctly; for instance, the VGA interface displays images normally, as shown in Figure 2. Moreover, this error does not appear in Debug mode. Figure … Read more