Contents Introduction to JTAG Boundary Scan BSDL Files Contents Introduction Boundary-Scan Register Boundary Scan BSDL File Analysis Applications of BSDL Files Reference Introduction BSDL stands for Boundary Scan Description Language, which is a subset of VHDL. It conforms to the syntax standards of VHDL and is used to describe the implementation of JTAG in specified … Read more
Introduction JTAG is something that IC and embedded enthusiasts must have used, but for those who don’t understand the internal workings of JTAG and its implementation, this article is worth a read. For those who have previously learned about coresight, you are aware of ARM’s internal debugging, knowing that the entry point for debugging lies … Read more
In 1985, European manufacturing organizations established the Joint European Test Action Group (JETAG) to research testing for integrated circuits. Later, in collaboration with North American companies, this organization was renamed JTAG (Joint Test Action Group) in 1986, and corresponding testing standards were designated. This standard was approved by IEEE in 1990 as an international standard … Read more
In modern electronic system design and development, debugging, testing, and programming are key processes to ensure product functionality and reliability. As the integration of integrated circuits (ICs) continues to increase and packaging forms become more complex (such as BGA, QFN, etc.), traditional probe testing methods have become inadequate for physically contacting chip pins. To address … Read more
DAP and JTAG There are various ways to connect to the Debug Access Port (DAP), which differ in cost, invasiveness, and security. The DAP allows access to the core within the chip, which is typically the first to boot or is a dedicated microprocessor used for managing chip boot, debugging, and initializing DVFS and DRAM … Read more
Hello everyone, welcome to <span>LiXin Embedded</span>. Today, let’s talk about JTAG boundary scan. This tool is a powerful means for testing PCB interconnections and internal chip logic, defined in the IEEE 1149.1 standard. If you haven’t read the first two articles in this series, I recommend going back to catch up on the basics of … Read more
JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE 1149.1) primarily used for testing, debugging, and programming chips, PCBs, and systems. Through a dedicated hardware interface and protocol, it provides non-intrusive access to the internal circuits of chips. The JTAG protocol is widely used in embedded development, hardware verification, and fault diagnosis. … Read more
JTAG: The Core Interface for Chip Testability Design In the field of integrated circuit (IC) design, Design for Testability (DFT) is a key technology to ensure high reliability and yield in chip production. JTAG (Joint Test Action Group), as a standard test access interface, has become an important means for modern chips to implement DFT … Read more
Hello everyone, welcome to <span>LiXin Embedded</span>. Today, we will discuss JTAG boundary scan. This tool is essential for testing PCB interconnections and internal chip logic, defined in the IEEE 1149.1 standard. If you haven’t read the first two articles in this series, I recommend going back to catch up on the basics of JTAG debugging. … Read more
Research on Fault Injection and Detection Methods for Aero-Engine Electronic Controllers Based on Boundary Scan Wang Yao, Wen Tiedun, Chen Yaping, Zhang Tianhong Nanjing University of Aeronautics and Astronautics, School of Energy and Power Engineering Abstract: The aero-engine electronic controller is a complex circuit system designed around numerous large-scale integrated circuits. Traditional contact-based fault injection … Read more