Detailed Explanation of JTAG Architecture and Principles

Detailed Explanation of JTAG Architecture and Principles

In modern electronic system design and development, debugging, testing, and programming are key processes to ensure product functionality and reliability. As the integration of integrated circuits (ICs) continues to increase and packaging forms become more complex (such as BGA, QFN, etc.), traditional probe testing methods have become inadequate for physically contacting chip pins. To address … Read more

How to Retrieve Data from JTAG Daisy Chain Devices

How to Retrieve Data from JTAG Daisy Chain Devices

JTAG is a commonly used interface for debugging devices. When there are many devices, a JTAG daisy chain can be used to save external interfaces, resulting in fewer external connection wires. The connection method is shown in the figure below:When sending and receiving data, it is necessary to determine the data to be received and … Read more

Debugging Methods and Techniques for ATF Architecture 3.4 (GDB, JTAG, Logging System)

Debugging Methods and Techniques for ATF Architecture 3.4 (GDB, JTAG, Logging System)

Table of Contents 3.4.1 Overview of Debugging 3.4.2 GDB Debugging Methods Basic Configuration Multi-Stage Debugging Techniques Common Issues Handling 3.4.3 Practical JTAG Debugging Hardware Connection Configuration Key Debugging Scenarios 3.4.4 Using the Logging System TF-A Logging Framework Log Output Configuration Advanced Debugging Techniques 3.4.5 Typical Debugging Cases Case 1: BL2 Image Load Failure Case 2: … Read more

DAP, JTAG, and Boundary Scan

DAP, JTAG, and Boundary Scan

DAP and JTAG There are various ways to connect to the Debug Access Port (DAP), which differ in cost, invasiveness, and security. The DAP allows access to the core within the chip, which is typically the first to boot or is a dedicated microprocessor used for managing chip boot, debugging, and initializing DVFS and DRAM … Read more

In-Depth JTAG Boundary Scan: Hardcore Techniques for Embedded Testing

In-Depth JTAG Boundary Scan: Hardcore Techniques for Embedded Testing

Hello everyone, welcome to <span>LiXin Embedded</span>. Today, let’s talk about JTAG boundary scan. This tool is a powerful means for testing PCB interconnections and internal chip logic, defined in the IEEE 1149.1 standard. If you haven’t read the first two articles in this series, I recommend going back to catch up on the basics of … Read more

FPGA Not Loading Program from Flash When Connected to JTAG Downloader

FPGA Not Loading Program from Flash When Connected to JTAG Downloader

Recently, many people in the group have encountered the above situation, which has been quite puzzling. I had never faced such a situation before. If it were a common issue, there would surely be feedback on the official website. If it is a very specific case, then it can only be treated as a bug. … Read more

FPGA Hardware Design (Part 7) – USB to JTAG Circuit

FPGA Hardware Design (Part 7) - USB to JTAG Circuit

Introduction: JTAG stands for Joint Test Action Group, which is commonly referred to in the IEEE standard 1149.1 as the Standard Test Access Port and Boundary Scan Architecture. Its functionality is powerful, but for engineers engaged in embedded development, the most frequently used feature is programming chips, which typically requires a dedicated emulator. This article … Read more

A Simple Method to Quickly Read Internal Programs of Chips Using JLink

A Simple Method to Quickly Read Internal Programs of Chips Using JLink

Recently, during mass production of our company’s products, we discovered several boards with abnormal boot internal information, which prevented normal booting into the APP main program. Preliminary analysis suggested that the factory production line mistakenly flashed the boot program of other products. To verify this judgment, we need to read the internal program of the … Read more

Analysis of JTAG Principles and Its Application in ATE DFT Testing

Analysis of JTAG Principles and Its Application in ATE DFT Testing

JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE 1149.1) primarily used for testing, debugging, and programming chips, PCBs, and systems. Through a dedicated hardware interface and protocol, it provides non-intrusive access to the internal circuits of chips. The JTAG protocol is widely used in embedded development, hardware verification, and fault diagnosis. … Read more

JTAG Debugging – GDB Example

JTAG Debugging - GDB Example

OpenOCD is used to drive the JTAG interface, typically in conjunction with GDB for code execution debugging. The usage of GDB is fundamentally no different from its use in other contexts.Some debugging techniques for GDB: Advanced Usage of GDBThere are two ways to start GDB and interact with OpenOCD: GDB communicates with OpenOCD over TCP … Read more