The global AI computing power market is focusing on the customized ASIC chip field, entering a smoke-free “wheel battle”: OpenAI is preliminarily testing some of Google’s Tensor Processing Units (TPUs); NVIDIA has officially released NVLink Fusion, directly confronting the UALink alliance composed of several tech giants.… As the customized computing power competition enters deeper waters, the advantages of ASICs are becoming increasingly clear, and they are expected to reach a critical point of surpassing GPUs next year.
In April this year, Google launched its first custom AI accelerator designed specifically for inference.
The “catfish” enters the customized computing power competition.
With the trend of high-performance computing chips shifting from general-purpose to specialized, ASIC chips are emerging in various fields due to their optimization for specific applications. Among them, artificial intelligence is one of the important application directions for ASIC chips, which can perform underlying optimizations for deep learning algorithms, supporting applications such as natural language processing with efficient computing power and low energy consumption during AI model training and inference tasks.
Recently, it was reported that OpenAI has begun renting Google’s TPU chips to provide computing power support for its ChatGPT and other AI products. In this regard, Morgan Stanley analysts pointed out that this is an important endorsement of Google’s AI infrastructure capabilities by OpenAI, which will drive growth in Google’s cloud business and solidify its leading position in the ASIC ecosystem.
In April of this year, Google made a significant announcement at its annual Google Cloud conference, unveiling the seventh-generation TPU chip—Ironwood. Notably, it is Google’s most powerful and scalable custom AI accelerator to date and the first accelerator designed specifically for inference, directly challenging NVIDIA’s Blackwell B200. According to Google Cloud employees, although Google has opened its TPU chips to competitors, it will still reserve the more powerful TPUs for its own AI team to develop for its Gemini model.
TPUs are a typical architecture among ASIC chips, and OpenAI’s focus on TPUs is seen as a key turning point in the AI infrastructure market. As one of the largest purchasers of NVIDIA GPUs, if OpenAI begins to purchase TPUs on a large scale in the future, it will directly weaken NVIDIA’s GPU advantage.
“As the chip industry chain continues to mature, compared to general-purpose chips or FPGA chips, ASIC chips can provide higher performance, lower power consumption, and more competitive prices in scenarios where business logic is determined and demand is high,” said Gu Licheng, a solution architect at Zhonghao Xinying, to reporters from China Electronics News. Different fields have varying requirements for chip performance, power consumption, size, etc., leading to a diversified demand in the ASIC chip market, which is continuously expanding.
In fact, facing the gradually rising ASIC ecosystem, NVIDIA, which has benefited from GPUs, is already anxious. On May 19, NVIDIA officially released and publicly mentioned NVLink Fusion technology, a semi-custom AI infrastructure solution that focuses on deeply integrating NVIDIA’s high-speed interconnect technology NVLink with third-party ASICs, CPUs, and other heterogeneous chips. The first batch of manufacturers adopting NVLink Fusion includes several semiconductor companies such as MediaTek, Marvell, Synopsys, and Cadence. Huang Renxun stated that NVLink Fusion will open NVIDIA’s AI platform and rich ecosystem to partners, helping them build dedicated AI infrastructure.
NVIDIA officially launched NVLink Fusion in May this year, directly competing with the UALink alliance.
The launch of NVLink Fusion represents NVIDIA’s direct competition with the UALink alliance. Given the increasing demand for AI computing power and the challenges of complex business scenarios, it is clear that relying solely on NVIDIA is unrealistic. More and more cloud service tech giants are moving towards the direction of self-developed ASIC customization. The UALink alliance, as an AI server chip interconnect organization, aims to establish an open interconnect ecosystem, with members from top manufacturers in cloud computing, semiconductors, processor IP, software companies, and OEMs, including Amazon AWS, Alibaba, AMD, Apple, Google, Meta, and Microsoft.
In this increasingly fierce competition among AI chip giants, the ASIC ecosystem is gradually improving, forcing NVIDIA, which has built a GPU moat, to expand its ecosystem in the name of technological openness. As more “catfish” enter the ASIC market, how will the power structure of the AI computing power market be reshaped in the future?
The AI computing power market is approaching a new critical point.
In recent years, the spotlight in the AI field has been occupied by training large models, but with the emergence of numerous AI inference models, the deployment of AI Agents in marketing, customer service, and operations further amplifies the demand for inference performance, making inference a key driving force of the AI economy.
As the focus of AI computing power shifts from training to inference, the highly customized and energy-efficient advantages of ASIC chips are becoming increasingly clear. Goldman Sachs, in its recent report, introduced ASIC AI servers as a new category, believing that as the demand for AI inference rises, ASIC servers with customization advantages and budget-friendly features will account for 38% to 40% of the global server market by 2025 to 2026.
Against this backdrop, the customized computing power competition is entering deeper waters, with global cloud service providers such as Google, Meta, Microsoft, and AWS racing to advance their self-developed ASIC layouts. In addition to Google, which has iterated its TPU chips to the seventh generation, Meta is set to launch its first AI ASIC chip MTIA T-V1 in collaboration with Broadcom in the fourth quarter of this year, which may exceed NVIDIA’s next-generation AI chip “Rubin” in specifications. AWS has initiated the development of different versions of Trainium v3, expected to be mass-produced in 2026. However, the path to self-developed ASICs for cloud giants is not without obstacles, as Microsoft has recently been reported to face setbacks in its self-developed AI chip, with the originally planned mass production of the AI chip Braga being postponed to 2026.
Nevertheless, the momentum for ASICs remains strong. According to the latest financial reports from major ASIC chip design companies Broadcom and Marvell, Broadcom’s AI-related business revenue reached $4.4 billion in the second quarter of 2025, a year-on-year increase of 46%. Broadcom stated that the AI chip market is expected to reach $60 billion to $90 billion in the next three years. In the first quarter of fiscal year 2026, Marvell’s data center business revenue reached $1.44 billion, accounting for 76% of total revenue, with the custom chip business driven by AI becoming a core engine. Marvell’s CEO Matt Murphy emphasized that custom AI chips are a key strategic direction for the company and pointed out that it is in a core position for building AI infrastructure transformation.
With the support of major ASIC chip manufacturers and cloud giants, the AI computing power market is approaching a new critical point. According to the latest report from Nomura Securities, NVIDIA GPUs currently account for over 80% of the AI server market, while ASICs only account for 8% to 11%. By 2025, the combined shipments of ASIC chips from Google and Amazon AWS are expected to account for 40% to 60% of NVIDIA GPU shipments (5 to 6 million). By 2026, with large-scale deployments from Meta and Microsoft, ASIC shipments are expected to surpass NVIDIA GPUs. At that time, the market will shift from investment-driven to application-driven, marking the official arrival of the ASIC era.
Before this critical point arrives, ASIC chips still face both opportunities and challenges. Due to the complex processes from design, manufacturing to mass production of ASIC chips, the long cycles, and the significant one-time investments, related companies will face challenges in R&D cycles and costs, as well as the reality of increasingly fierce competition and technological catch-up pressures.
From an application perspective, the ASIC industry is deeply penetrating from the cloud to the edge. Looking at the global market, the ASIC field is showing a pattern of “North America dominance, China acceleration, emerging markets explosion.”
“International giants monopolize the market through technological barriers and ecological closed loops, while cross-industry competition intensifies, with tech giants and startups alike entering the field,” Gu Licheng stated. Currently, the AI computing hardware landscape in North America is undergoing a shift, and the AI chip market has entered a more competitive new phase. In contrast, domestic companies still face gaps in technology R&D levels, high-end talent reserves, and industry chain collaboration. Domestic companies can learn from North American companies’ experiences in technological innovation and market expansion to accelerate the speed of technological iteration and improve product competitiveness, securing a more advantageous position in the global ASIC chip market.
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