The ASIC market is growing.
This has long been a consensus in the industry. However, what is surprising is that the speed of ASIC growth is incredibly fast. Morgan Stanley predicts that the AI ASIC market size will grow from $12 billion in 2024 to $30 billion in 2027, with a compound annual growth rate of 34%.
It is worth noting that from 2023 to 2029, the compound annual growth rate of the high-performance computing GPU market is 25%, while the growth rates for CPUs and APUs are only 5% and 8%, respectively.
01The ASIC Market: A Growing Cake
TrendForce’s latest research report indicates that with the rapid growth of demand for AI servers, major cloud service providers (CSPs) in the United States are accelerating the internal development of application-specific integrated circuit (ASIC) chips, releasing new generations of products every 1 to 2 years. In China, the AI server market is gradually adapting to the new export control policies implemented by the U.S. starting in April 2025. It is predicted that these measures will lead to a decrease in the market share of imported chips (such as NVIDIA and AMD products) from 63% in 2024 to about 42% in 2025.
Meanwhile, with the government’s active promotion of policies supporting domestic AI processors, it is expected that the market share of local chip manufacturers in China will increase to 40%, nearly equal to that of imported chips.
Custom chips are an economic choice, not just a technical choice. The most important driving force behind the growth of the ASIC cake is simply: money.
Currently, GPU servers remain the primary choice for end users, but due to supply constraints on certain GPU products, a computing power gap has emerged. Many leading internet companies have increased the deployment of self-developed ASIC chip servers to reduce costs and better adapt to their business scenarios.
For example, within the same budget, AWS’s Trainium 2 (ASIC chip) can complete inference tasks faster than NVIDIA’s H100 GPU, with a cost-performance improvement of 30% to 40%. The upcoming Trainium 3, scheduled for release next year, will double the computing performance and improve energy efficiency by 40%.
Cloud solution providers are prioritizing ASIC development to reduce dependence on NVIDIA and AMD, better control costs and performance, and enhance supply chain flexibility. This shift is crucial for managing the growing AI workloads and optimizing long-term operational expenses.
Additionally, if a chip can provide a strategic advantage, then ASICs make sense. Apple is a typical example, as is Google.
02Typical ASIC Representative: TPU
Manufacturers’ pursuit of energy efficiency and cost is endless. Major cloud computing and large model companies such as Google, Amazon, Meta, and OpenAI are accelerating the layout of customized ASICs. Domestic companies like Cambricon, Damo Academy, Baidu, and Tencent are also launching their own ASIC chips.
The mainstream ASIC chips include TPU, NPU, and VPU chips.
Google’s TPU is a very typical representative of ASICs. This was Google’s first product launched in 2016, aimed at efficiently processing tensor operations.
The latest TPU was released in April this year, with Google launching the seventh generation tensor processing unit (TPU) Ironwood. Google claims that under large-scale deployment, this AI accelerator can achieve computing power more than 24 times that of the world’s fastest supercomputer.
Ironwood has super model specifications, providing 42.5 exaflops of AI computing power when each pod expands to 9216 chips, far exceeding the 1.7 exaflops of the current fastest supercomputer, El Capitan. Each Ironwood chip has a peak computing capability of 4614 TFLOPs.
In terms of single chip specifications, Ironwood significantly enhances memory and bandwidth, with each chip equipped with 192GB of high-bandwidth memory (HBM), six times that of the previous generation TPU Trillium released last year. Each chip’s memory bandwidth reaches 7.2 terabits/s, 4.5 times that of Trillium.
Currently, TPU chips have become the third largest data center chip design manufacturer globally. According to industry insiders, the production volume of Google TPU chips reached between 2.8 million and 3 million last year.
In China, the company focusing on TPU chips is Zhonghao Xinying. The founder, Yang Gongyifan, was involved in the design and development of TPU v2/3/4 in Google’s core TPU R&D team.
In 2024, the founder and CEO of Zhonghao Xinying revealed that in 2023, the company successfully achieved mass production delivery of the first high-performance TPU training chip “Shan” designed entirely in-house for AI training.
It is reported that “Shan”, as a fully self-developed GPTPU architecture AI training chip, has completely controllable IP cores, a fully self-developed instruction set, and computing platform. When handling large-scale AI model training and inference tasks, “Shan”‘s computing performance surpasses NVIDIA’s A100, with system cluster performance ten times that of traditional GPUs, and energy consumption for the same training task is only half that of traditional GPUs. Compared to foreign products, the unit computing cost of “Shan” chips is only 42% of theirs.
03ASIC: Constant Competition
In the ASIC market, Broadcom currently holds the first position with a share of 55% to 60%, while Marvell ranks second with a share of 13% to 15%.
Broadcom’s core advantage in the AI chip field lies in customized ASIC chips and high-speed data exchange chips, with solutions widely used in data centers, cloud computing, HPC (high-performance computing), and 5G infrastructure.
According to the latest financial report, Broadcom’s first-quarter fiscal year 2025 revenue reached $14.916 billion, a year-on-year increase of 25%; non-GAAP net profit was $7.823 billion, a year-on-year surge of 49%. Among them, AI-related revenue was $4.1 billion, a year-on-year increase of 77%, accounting for 28% of total revenue, and as high as 50% in the semiconductor business.
Broadcom’s ASIC chip business has become its core growth point. The financial report disclosed that sales of customized AI chips (ASIC) are expected to account for 70% of total AI semiconductor revenue in the second quarter, reaching $30.8 billion (approximately $45 billion).
Broadcom has two major collaborations that are noteworthy: the first is that Meta and Broadcom have collaborated to develop the first two generations of AI training acceleration processors, and both parties are accelerating the development of the third generation MTIA chip, which is expected to make significant progress from the second half of 2024 to 2025.
The second is that OpenAI has commissioned Broadcom to develop two generations of ASIC chip projects, planned for production in 2026, which will adopt industry-leading 3nm/2nm process technology and advanced 3D SOIC packaging technology. Meanwhile, although Apple is still using Google’s TPU, its self-developed AI chip project is actively progressing.
Marvell’s customized chip (ASIC) business is becoming one of its strong growth drivers. In Marvell’s specific business, the data center business accounts for about 75%, which is a high-growth business. This part of the business includes SSD controllers, high-end Ethernet switches (Innovium), and customized ASIC business (custom chips for Amazon AWS), mainly applied in cloud servers, edge computing, and other scenarios.
Since 2018, Marvell has successively acquired companies such as Cavium and Innovium, thereby enhancing the company’s ASIC and data center capabilities.
The latest financial report shows that Marvell’s data center business achieved revenue of $1.44 billion in the first quarter of fiscal year 2026, a quarter-on-quarter increase of 5.5%, in line with market expectations ($1.44 billion).
Based on company communications and industry chain information, Marvell’s current ASIC revenue mainly comes from Amazon’s Trainium 2 and Google’s Axion Arm CPU processors, and the company’s Inferential ASIC project in collaboration with Amazon is expected to start mass production in 2025 (fiscal year 2026). The Microsoft Maia project in collaboration with Microsoft is expected to be completed in 2026 (fiscal year 2027).
However, it is important to note that, unlike NVIDIA, which has more attractive stories such as “sovereign AI” and “startup explosion”, Marvell’s customized AI chips are still limited to the investment pace of core CSPs (cloud service providers).
Given the overall decline in capital expenditures among the four major cloud vendors this quarter, even if Marvell has gained more market share through competition, the overall market contraction remains an undeniable fact.
Domestic companies are also actively developing ASICs.
Cambricon Technology is also expanding its Siyuan (MLU) chip series (such as the 7nm Siyuan 370 and training chip Siyuan 290) to support AI training and inference in the cloud. Major customers include: mobile (Huawei was once a major customer), intelligent computing centers (government orders), and server manufacturers (Inspur, Lenovo).
At the same time, domestic cloud service providers have also launched their own self-developed ASIC chips.
Alibaba launched the Han Guang 800, an AI inference chip for the cloud, with a peak performance of 78,000 IPS (able to process 78,000 images per second) and a peak energy efficiency of 500 IPS/W. At that time, Alibaba claimed it was the world’s highest-performance AI inference chip, with one Han Guang 800 equivalent to 10 GPUs.
Baidu after mass production of the second generation Kunlun chip, announced this year that Baidu Smart Cloud successfully lit up the first self-developed Wan Ka cluster. It also announced that it is using the third generation Kunlun chip P800. P800 has memory specifications that outperform mainstream GPUs by 20% to 50%, is more friendly to the MoE architecture, and is the first to support 8-bit inference, allowing a single machine with 8 cards to run a 671B model. Because of this, Kunlun chips are easier to deploy compared to similar products, while significantly reducing operating costs, easily completing the inference tasks of DeepSeek-V3/R1 in all versions. The self-developed low cost has allowed the official prices of DeepSeek R1 and V3 on the Baidu Smart Cloud platform to drop to 50% and 30%, achieving the lowest prices on the entire network.
Tencent, in addition to its self-developed Zixiao inference chip, has also strategically invested in utilizing Enflame’s ASIC solutions. It is reported that Tencent’s self-developed AI inference chip “Zixiao” has already been mass-produced and implemented in several leading businesses, and has been fully launched in Tencent Meeting’s real-time subtitles, with a single Zixiao machine load reaching 4 times that of T4, reducing the timeout rate from 0.005% to 0.
04Conclusion
The growth of the ASIC market also brings new challenges.
A company wants to save a few dollars in supplier profits by designing its own chips. However, chip design is not a cheap commodity, especially advanced chip design, which has become very expensive.
Taiwan Semiconductor Manufacturing Company (TSMC) charges about $30,000 per wafer for 2nm, and the cost for 1.4nm after 2nm even reaches $45,000.
We need to consider: do we really need every company to have its own CPU?
