Understanding DVFS: Essential for Low Power Design

DVFS stands for Dynamic Voltage Frequency Scaling.

It is a low-power technology that dynamically adjusts the operating frequency and voltage of processors (or other hardware components) during system operation to achieve a balance between performance requirements and power consumption.

The basic principle is based on a key physical fact: the power consumption of CMOS digital integrated circuits is proportional to the square of their operating frequency and voltage.

This can be simplified to the formula: <span><span>P ∝ C * V² * f</span></span>

• P: Power consumption

• C: Load capacitance (a hardware constant)

• V: Operating voltage

• f: Operating frequency

The working principle can be summarized as follows:

1. Monitor system load: The operating system or hardware itself continuously monitors metrics such as processor usage and task queue length.

2. Make decisions: When the system detects a light load (for example, when you are just reading a document or listening to music), it issues commands to lower the processor’s operating frequency (<span><span>f</span></span>).

3. Synchronously lower voltage: Since the processor can operate stably at a lower frequency, its operating voltage (<span><span>V</span></span>) can also be lowered synchronously. According to the formula above, reducing the voltage leads to a square reduction in power consumption, resulting in significant energy savings.

4. Reverse operation: When the system detects an increased load (for example, when you suddenly start a large game or perform video rendering), it quickly raises the frequency and voltage to ensure that tasks can be completed in a timely manner, providing a smooth user experience.

DVFS typically operates at three levels:

1. Hardware support: The processor must be designed to operate normally at different voltage-frequency pairs (known as Operating Performance Points, OPP).

2. Operating system scheduler: The operating system kernel (such as Linux’s CPUFreq subsystem, Windows power management) is responsible for monitoring system load and deciding which voltage-frequency pair to adjust to based on the current power policy (such as “power-saving mode,” “balanced mode,” “high-performance mode”).

3. Power management framework: The operating system issues commands to the hardware to adjust voltage and frequency through specific drivers and frameworks.

The main processes are as follows:

1. Frequency adjustment

Frequency adjustment is achieved by changing the multiplier/divider settings of the processor’s internal Phase-Locked Loop (PLL).

• Process: This is essentially a reconfiguration process of an electronic circuit. The CPU sends new configuration values to the PLL, which takes some time to “lock” onto the new frequency.

• Time taken: This locking process is usually very fast, typically between 10 to 100 microseconds.

• Impact on cycles: During this period, the CPU’s clock is usually temporarily frozen or becomes unstable, so no instructions are executed. Once the PLL locks successfully, a stable new clock signal is restored, and the CPU continues executing from where it stopped. Therefore, the frequency switch itself introduces a very short execution pause.

1. Voltage adjustment

Voltage adjustment is performed by a power management chip called a Voltage Regulator (VR).

• Process: The operating system issues commands to the VR through the power management chip, requesting it to output a new voltage value. The VR needs time to adjust its internal circuits and stabilize its output to the new voltage level.

• Time taken: This process is much slower than frequency switching, typically between 50 to 1000 microseconds, depending on the design of the VR and the magnitude of the voltage change. Transitioning from a low voltage to a high voltage may take several hundred microseconds.

• Impact on cycles: During voltage adjustment, the CPU must stop working. If the voltage is unstable (too high or too low), transistors cannot switch reliably, leading to computational errors or even hardware damage. Therefore, voltage adjustment is accompanied by a longer execution pause than frequency switching.

Due to power consumption and stability requirements, voltage and frequency adjustments must follow a strict order:

1. During boost: increase voltage first, then increase frequency

1. Reason: At higher frequencies, transistors need to switch faster, which requires higher voltage to drive. Forcing an increase in frequency without sufficient voltage can lead to timing errors, causing the CPU to malfunction or even crash the system.

2. Timing: Issue boost command -> wait for voltage to stabilize (slow, ~hundreds µs) -> issue frequency increase command -> wait for PLL to lock (fast, ~tens µs) -> resume normal operation.

2. During throttle: decrease frequency first, then decrease voltage

1. Reason: When the frequency is lowered, transistors can operate stably at lower voltages. If the voltage is lowered first while the frequency is still high, it can also lead to timing errors and system instability.

2. Timing: Issue frequency decrease command -> wait for PLL to lock (fast) -> issue voltage decrease command -> wait for voltage to stabilize (slow) -> resume normal operation.