Follow+Star PublicAccount, don’t miss exciting content Author | strongerHuang WeChat Public Account | Embedded Column The mainstream download interfaces for microcontrollers based on the Cortex-M core are JTAG and SWD. Differences Between SWD and JTAG Pins: JTAG: TDI: Test Data In. Serial input pin TDO: Test Data Out, serial output pin TCK: Test Clock, clock … Read more
Author | strongerHuang WeChat Official Account | Embedded Column The mainstream download interfaces for microcontrollers based on the Cortex-M core are JTAG and SWD. Differences Between SWD and JTAG Pins: JTAG: TDI:Test Data In. Serial input pin TDO:Test Data Out, serial output pin TCK:Test Clock, clock pin TMS:Test Mode Select, mode select (control signal) pin … Read more
IIC IIC (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS for connecting microcontrollers and their peripheral devices. The I2C bus transmits information between the bus and devices using two lines (SDA and SCL), enabling serial communication between the microcontroller and external devices or bidirectional data transfer between the master and slave devices. … Read more
Click the blue text to follow us Follow and star our public account for exciting content delivered daily Source: Online Materials 1 Reasons for Changing FPGA Debugging Technology During the functional debugging of hardware design, the reprogrammability of FPGAs is a key advantage. In the early use of CPLDs and FPGAs, if a design was … Read more
Click the blue text above to follow us The logic analyzer is an instrument that collects and displays digital signals from the test device using a clock, primarily for timing judgment. Unlike oscilloscopes, which have multiple voltage levels, logic analyzers typically display only two voltages (logic 1 and 0). After setting a reference voltage, the … Read more
Click the blue text to follow us Follow and star our official account for exciting content delivered daily Source: Online materials 1 Reasons for Changing FPGA Debugging Techniques During functional debugging of hardware design, the reprogramming capability of FPGA is a key advantage. In the early use of CPLD and FPGA, if a design was … Read more
With the official release of the first RISC-V Chinese book “Hands-On CPU Design – RISC-V Processor Edition” more and more enthusiasts are starting to use the open-source Hummingbird E203 RISC-V core, and many beginners have left messages asking about the use of the RISC-V toolchain. To facilitate beginners in quickly learning RISC-V CPU design and … Read more
The previous two articles introduced the basic principles of boundary scan and BSDL files. This article introduces two software tools commonly used for boundary scan testing. In the practical application section, we will demonstrate boundary scan testing applications based on STM32 and FPGA. This article introduces two commonly used boundary scan testing software: XJTAG and … Read more
Previous article, introduced the JTAG boundary scan application based on STM32F103, demonstrated the application of TopJTAG Probe software, and the basic functions of boundary scan. This article introduces the boundary scan application based on Xilinx FPGA, which is almost the same. 1. Obtain the Chip’s BSDL File The method of obtaining the BSDL file for … Read more
The JTAG interface is a type of interface used for downloading programs, and it is also frequently connected and disconnected while powered. It is well-known that hot-plugging can inevitably generate some surges or ESD (Electrostatic Discharge). Therefore, if protective measures are not taken, it is easy for surge ESD to break down the JTAG-related pins, … Read more