IIC (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS for connecting microcontrollers and their peripheral devices. The I2C bus transmits information between the bus and devices using two lines (SDA and SCL), enabling serial communication between the microcontroller and external devices or bidirectional data transfer between the master and slave devices. I2C is an open-drain output, and most I2C implementations are two-wire (clock and data), typically used for transmitting control signals.
IIS
I2S (Inter-IC Sound Bus) is a bus standard established by Philips for audio data transmission between digital audio devices. I2S has three main signals: 1. Serial clock SCLK, also known as bit clock, corresponds to each bit of digital audio data, with one pulse per bit. 2. Frame clock LRCK, used to switch between left and right channel data. LRCK is ‘1’ when transmitting left channel data and ‘0’ when transmitting right channel data. 3. Serial data SDATA, which represents audio data in binary two’s complement. Sometimes, to better synchronize systems, an additional signal MCLK is transmitted, referred to as master clock or system clock (Sys Clock).
SPI
SPI (Serial Peripheral Interface) was first defined by Motorola for its MC68HCXX series processors. The SPI interface is primarily used between EEPROM, FLASH, real-time clocks, AD converters, and digital signal processors and decoders. The SPI interface operates in a master-slave mode, usually involving one master device and one or more slave devices, with the following four signal interfaces: (1) MOSI – master device data output, slave device data input (2) MISO – master device data input, slave device data output (3) SCLK – clock signal generated by the master device (4) /SS – slave device enable signal controlled by the master device.
UART
UART (Universal Asynchronous Receiver Transmitter) converts parallel data transmitted from the computer into an output serial data stream. It converts incoming serial data from external sources into bytes for use by devices requiring parallel data within the computer. It adds parity bits to the output serial data stream and performs parity checks on the received data stream. It adds start and stop markers to the output data stream and removes them from the received data stream. It handles interrupt signals issued by the keyboard or mouse (both are serial devices). It can manage synchronization issues between the computer and external serial devices. Some high-end UART implementations also provide input and output data buffers, commonly using TXD, RXD, /RTS, /CTS.
JTAG
JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE1149.1 compatible), mainly used for internal chip testing. The standard JTAG interface consists of four lines: TMS, TCK, TDI, TDO, which are mode select, clock, data input, and data output lines, respectively. The test reset signal (TRST, generally active low) is usually an optional fifth port signal. A CPU containing a JTAG debug interface module can access the internal registers of the CPU and devices on the CPU bus, such as FLASH, RAM, and registers of built-in modules like UART, timers, GPIO, etc., as long as the clock is functioning normally.
CAN
CAN stands for “Controller Area Network,” one of the most widely used field buses internationally. Originally, CAN was designed for microcontroller communication in automotive environments, exchanging information between various electronic control units (ECUs) in vehicles, forming an automotive electronic control network. For example, it is embedded in systems like engine management systems, transmission controllers, instrument equipment, and electronic backbone systems. A single network composed of CAN can theoretically connect countless nodes. In practical applications, the number of nodes is limited by the electrical characteristics of the network hardware. For instance, when using Philips P82C250 as a CAN transceiver, up to 110 nodes are allowed on the same network. CAN can provide data transmission rates of up to 1Mbit/s, making real-time control very feasible. Additionally, the hardware error checking characteristics enhance CAN‘s ability to resist electromagnetic interference.
SDIO
SDIO is an extension interface of the SD type, allowing not only the connection of SD cards but also devices that support the SDIO interface. The port’s use extends beyond just inserting storage cards. Devices such as PDAs, laptops, etc., that support SDIO can connect to devices like GPS receivers, Wi-Fi or Bluetooth adapters, modems, LAN adapters, barcode readers, FM radios, TV receivers, RFID readers, or digital cameras that use the SD standard interface.
GPIO
GPIO (General Purpose Input Output) or bus expanders simplify the expansion of I/O ports using industrial standard I²C, SMBus™, or SPI™ interfaces: STM32‘s GPIO circuit principles. When the microcontroller or chipset lacks sufficient I/O ports, or when the system requires remote serial communication or control, GPIO products can provide additional control and monitoring functions. Each GPIO port can be individually configured as input or output via software.
