Understanding JTAG Interface: Key Insights

Understanding JTAG Interface: Key Insights

Welcome to the world of FPGA technology. In this vast realm, meeting is fate. You can follow FPGA technology to gain other resources of interest in the “adventurous journey” and “heroic deeds” sections, or share a drink and chat. “Cooking wine and chatting” leads to the IC technology circle, where there are nearly 50 IC … Read more

Understanding JTAG: What You Know and Don’t Know

Understanding JTAG: What You Know and Don't Know

Welcome FPGA engineers to join the official WeChat technical group Clickthe blue textto follow our FPGA home – the best and largest pure FPGA engineer community in China 01 Introduction to JTAG JTAG (Joint Test Action Group) is an interface, and a group called the JTAG group was established for this interface in 1985. In … Read more

Understanding JTAG Boundary Scan Technology

Understanding JTAG Boundary Scan Technology

Follow our public account for timely updates on new articles. Introduction: Engineers engaged in hardware, embedded systems, or chip-related fields are likely familiar with JTAG. JTAG primarily has three main uses: Testing and Diagnosis: Initially, the main purpose of JTAG was for testing and diagnosing integrated circuits, used to detect and repair defects in the … Read more

Troubleshooting JTAG Connection Issues

Troubleshooting JTAG Connection Issues

Wu Jianying Microcontroller Development Board Address Shop:【Wu Jianying’s Shop】 Address:【https://item.taobao.com/item.htm?_u=ukgdp5a7629&id=524088004171】 This article contains two parts: 1) Continuing the discussion on the TI DSP connection issues; 2) Briefly mentioning the Xilinx FPGA JTAG connection issues. 1. Why Can’t the TI DSP Connect? Half a year ago, I published a blog post titled “Why Can’t the DSP … Read more

Hardware Design – JTAG Chain

Hardware Design - JTAG Chain

01 JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE 1149.1 compliant) primarily used for internal chip testing. Most advanced devices now support the JTAG protocol, such as DSPs and FPGAs. The standard JTAG interface consists of four lines: TMS (Test Mode Select), TCK (Test Clock Input), TDI (Test Data Input), and … Read more

What Is JTAG?

What Is JTAG?

Welcome FPGA engineers to join the official WeChat technical group. ClickBlue WordsFollow us at FPGA Home – the largest pure engineer community in China. JTAG is an IEEE standard (1149.1) developed in the 1980s to solve electronic board manufacturing issues. Nowadays, it can be used for programming, debugging, and probing ports. But first, let’s look … Read more

Understanding JTAG Interface: Common Issues and Solutions

Understanding JTAG Interface: Common Issues and Solutions

Source: FPGA Resource Hero In the process of FPGA development and learning, a critical step is the board download implementation. Achieving hardware “hard realization” is crucial, and generally, the JTAG interface is more commonly used. Therefore, many experts must have encountered issues with the JTAG interface malfunctioning or being damaged and unusable. Recently, I faced … Read more

FPGA-Based Multi-Channel UART/SPI Communication System

FPGA-Based Multi-Channel UART/SPI Communication System

1. Design Overview This design implements a multi-channel UART/SPI communication system, capable of one-to-many communication. The system can operate in UART mode or SPI mode. The reason I chose this topic is mainly that my current laboratory needs to write a fast communication system based on UART. This topic can help solidify my previously learned … Read more

UART Serial Communication Principles and Verilog Implementation

UART Serial Communication Principles and Verilog Implementation

Welcome FPGA engineers to join the official WeChat technical group ClickBlue TextFollow us at FPGA Home – the largest and best FPGA community for pure engineers in China 1.Software and Hardware Platforms Software Platform: 1. Operating System: Windows-8.1 2. Development Suite: ISE14.7 3. Simulation Tool: ModelSim-10.4-SE Hardware Platform: 1. FPGA Model: XC6SLX45-2CSG324 2. USB to … Read more

UART Transceiver Module Design – 01

UART Transceiver Module Design - 01

Welcome FPGA engineers to join the official WeChat technical group. UART (Universal Asynchronous Receiver-Transmitter) Transceiver Module Design – 01 Introduction to UART Protocol UART, as a type of asynchronous serial communication protocol, operates by transmitting data one bit at a time. Each bit has the following meanings: Idle Bit: When there is no data transmission, … Read more