1. Configuration of FIR IP in Vivado 2. Setting up the simulation environment with Vivado and Modelsim 1. Importing Data from Matlab to Modelsim In the previous chapter, we designed a FIR digital filter using Vivado, and in the Modelsim simulation, the output data from the FIR IP was written to the data_out.txt file. This … Read more
1. Configuration of FIR IP in Vivado 2. Setting up the simulation environment with Vivado and Modelsim 1. Configuration of FIR IP in Vivado Vivado provides FIR IP for implementing low-pass filter FIR functionality. For specific details, please refer to the corresponding official manual. Here, we will briefly introduce the configuration interface of the FIR … Read more
In the book ‘The Legend of Tong Lin’, Tong Lin practiced the basics of ‘circling a big tree and untying a rope’ before mastering skills like ‘ghostly shadows following’ and ‘willow leaf soft palm’. In my opinion, to become a competent FPGA designer, one must master five essential skills: simulation, synthesis, timing analysis, debugging, and … Read more
Welcome FPGA engineers to join the official WeChat technical group ClickBlue TextFollow us at FPGA Home – the largest and best FPGA community for pure engineers in China 1.Software and Hardware Platforms Software Platform: 1. Operating System: Windows-8.1 2. Development Suite: ISE14.7 3. Simulation Tool: ModelSim-10.4-SE Hardware Platform: 1. FPGA Model: XC6SLX45-2CSG324 2. USB to … Read more
Welcome FPGA engineers to join the official WeChat technical group Clickthe blue textto follow us at FPGA Home – the largest and best community for pure FPGA engineers in China This chapter Introduction: Can be started at any time, can be restarted, the delay duration is adjustable, and the unit can be switched (ms/us). The … Read more