Designing an FIR Digital Filter with Desired Amplitude-Frequency Characteristics Using MATLAB

First, write out a normalized frequency vector and its corresponding amplitude vector, where the amplitude vector represents the desired amplitude-frequency characteristics data. Set the order of the FIR digital filter, call fir2() to design the FIR digital filter, and use freqz() to view the filter’s amplitude-frequency characteristics. %%FIR digital filter meets expected frequency characteristics%% fir2();freqz(); … Read more

Example of Designing an Optimal Equiripple FIR Digital Filter Using MATLAB

First, write out a normalized frequency vector and its corresponding magnitude vector, where the magnitude vector represents the desired amplitude-frequency characteristics. Set the order of the FIR digital filter, or use remezord() to calculate the order of the digital filter, and call remez() to design the FIR digital filter, which exhibits equiripple behavior in the … Read more

FPGA Notes 1

1. Explanation of Other Settings on the IP Core Configuration Implementation Page: 1️⃣ Coefficient Fractional Bits Function: Specifies the number of bits used for the fractional part of the FIR filter coefficients. Significance: Vivado quantizes floating-point coefficients (e.g., 0.125) into fixed-point integers, calculated as follows: ActualValueIntegerRepresentationIndication Example: If <span>Coefficient Width = 10</span>, <span>Coefficient Fractional Bits … Read more

FPGA Tutorial Case 14: Design and Implementation of FIR Filter Based on Vivado Core

FPGA Tutorial Case 14: Design and Implementation of FIR Filter Based on Vivado Core

01Design and Implementation of FIR Filter Based on Vivado CoreThe Finite Impulse Response (FIR) filter is a widely used filter in the field of digital signal processing, known for its good stability, ease of implementation, and linear phase characteristics. The FIR filter is a linear time-invariant system composed of a set of coefficients, which performs … Read more

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 1)

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 1)

1. Generating Input Waveforms for FIR IP in Matlab 2. Generating Filter Coefficients for FIR IP in Matlab In FPGA-based digital signal processing, data transfer and simulation verification between Matlab, Vivado, and Modelsim are required. The typical approach is for Matlab to generate input signals for the Verilog module as simulation stimuli, followed by testing … Read more

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 3)

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 3)

1. Configuration of FIR IP in Vivado 2. Setting up the simulation environment with Vivado and Modelsim 1. Importing Data from Matlab to Modelsim In the previous chapter, we designed a FIR digital filter using Vivado, and in the Modelsim simulation, the output data from the FIR IP was written to the data_out.txt file. This … Read more

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 2)

FIR Filter Series: Joint Simulation Verification Platform for FIR IP using Matlab, Vivado, and Modelsim (Part 2)

1. Configuration of FIR IP in Vivado 2. Setting up the simulation environment with Vivado and Modelsim 1. Configuration of FIR IP in Vivado Vivado provides FIR IP for implementing low-pass filter FIR functionality. For specific details, please refer to the corresponding official manual. Here, we will briefly introduce the configuration interface of the FIR … Read more

Insights on ADC Learning Experience

Insights on ADC Learning Experience

Wang Zhen – China Information Communication Technology: In this week’s collaborative learning, I systematically studied Chapter 7 of the book Analog-to-Digital Conversion, which mainly includes topics on time-domain and frequency-domain sampling, modulation and chopping, recovery of sampled data, noise, jitter, etc., further understanding the sampling circuits in ADC. Bu Zeng – Huawai: This week, I … Read more

FPGA Development + Digital Signal Processing Series + FIR Filter Series

FPGA Development + Digital Signal Processing Series + FIR Filter Series

1. FPGA Development Series 2. Digital Signal Processing Series 3. FIR Filter Series 1. FPGA Development Series Application of Ultrasonic Doppler Frequency Shift Demodulation Based on FPGA and MATLAB (Part 1) Application of Ultrasonic Doppler Frequency Shift Demodulation Based on FPGA and MATLAB (Part 2) Image Processing Based on FPGA: Image Grayscale Processing Image Processing … Read more

Design and Implementation of FIR Filter Based on DSP Builder

Design and Implementation of FIR Filter Based on DSP Builder

1 Introduction In the process of information signal processing, filters are used for tasks such as signal filtering, detection, and prediction. Digital filters are the most widely used devices in digital signal processing (DSP). The commonly used filters are Infinite Impulse Response (IIR) filters and Finite Impulse Response (FIR) filters. Among them, FIR filters can … Read more