Name: FPGA-Based 16×16 Dot Matrix Display Design VHDL Code Simulation Software: Quartus Language: VHDL Code Function: 16×16 Dot Matrix Display “VHDL” 1. Project Files 2. Program Files 3. Program Compilation 4. Testbench 5. Simulation Diagram Partial code display: LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; ENTITY led_16X16 IS PORT ( clk : IN STD_LOGIC; hang : … Read more
Name: FPGA-Based 16-Bit ALU Design VHDL Code Simulation Software: Quartus Language: VHDL Code Function: 1. Implement a simple 16-bit ALU using VHDL. 1) The main function of the Arithmetic Logic Unit (ALU) is to perform fixed-point arithmetic operations, logical operations, and various shift operations on binary data. Arithmetic operations include fixed-point addition, subtraction, multiplication, and … Read more
Name: Simple Digital Clock Design Based on FPGA: VHDL Code and Quartus Simulation Software: Quartus Language: VHDL Code Function: Simple digital clock design 1. Design a base-24 counter, which can adjust the count value using buttons. 2. Design a base-60 counter, which can adjust the count value using buttons. 3. Design a display module. 4. … Read more
Name: Design of a Sine Wave Signal Generator Based on FPGA: VHDL Code and ISE Simulation Software: ISE Language: VHDL Code Function: Using ISE to design a 14-bit sine wave signal generator based on the Xilinx DDS IP core; control the number and frequency of the output sine wave signals by manipulating the enable signal … Read more
Name: Design of a Whac-A-Mole Game Machine Based on FPGA with VHDL Code Simulation in ISE Software: Quartus Language: VHDL Code Function: The design of the Whac-A-Mole game machine uses 8 LED lights to represent 8 moles, a 3-digit 7-segment display to show the score, and 8 buttons to indicate the hitting points. A start … Read more
What is a shift register? In FPGA (or ASIC), a shift register is a very common basic module. Its essence is to connect multiple flip-flops (registers) in a chain. All flip-flops share the same clock signal, and the output of each flip-flop is connected to the input of the next flip-flop. In this way, data … Read more
Today, we will discuss the hardware design knowledge that every software programmer needs to understand, especially for those who are just starting to engage in hardware design. For developers who are already familiar with programming languages like C or Java, they often encounter misunderstandings when learning hardware description languages such as VHDL or Verilog. This … Read more
How many steps are needed to put an elephant in the fridge? Three steps: open the fridge door, put in the elephant, and close the door. So how many steps are needed to create a chip? Also three: design the chip, manufacture the chip, and finally package and test the chip. However, is making a … Read more
[Topic]: Detailed Analysis of FPGA-Based Sine Wave Generators [Author]: LinCoding [Date]: 2016.12.27 [Disclaimer]: Please indicate the source when reprinting or quoting We all know that FPGA is a digital device, and in the field of communication, it is often necessary to generate a sine wave signal as a modulation signal. The sine wave is generally … Read more
Source: EETOP BBS Author: leishangwen (Community Moderator) Recently, Wave officially announced that it will grant free licenses for the MIPS Instruction Set Architecture (ISA) to global customers. This initiative provides free access to the MIPS architecture for semiconductor companies, developers, and universities worldwide, enabling them to develop the next generation of System on Chip (SoC). … Read more