Mr. Big Cat says: Translation of Chapter 13 from the compilation “RFSoC-Book” is detailed in the first article of this series. “An open-source masterpiece, ‘Software Defined Radio Based on Zynq UltraScale+ RFSoC’” Mr. Big Cat, WeChat public account: Mr. Big Cat’s Little Bookcase, an open-source masterpiece, ‘Software Defined Radio Based on Zynq UltraScale+ RFSoC’ For … Read more
1. Introduction to FFT Algorithm and Vivado FFT IP Core 1. What is FFT? FFT (Fast Fourier Transform) is an efficient algorithm for computing the Discrete Fourier Transform (DFT). The mathematical definition of DFT is: Direct computation of DFT requires N multiplications and additions, while FFT reduces the complexity to:, significantly improving computational efficiency, making … Read more
Issue 5 | November 20, 2025 This article contains 3222 words, and reading it will take approximately 10 minutes. On September 30, 2025, the Delaware court in the United States issued a first-instance judgment in the licensing dispute case between ARM and Qualcomm. 1. Background: Licensing, Acquisition, and Litigation In 2021, Qualcomm announced its acquisition … Read more
01Design and Implementation of FIR Filter Based on Vivado CoreThe Finite Impulse Response (FIR) filter is a widely used filter in the field of digital signal processing, known for its good stability, ease of implementation, and linear phase characteristics. The FIR filter is a linear time-invariant system composed of a set of coefficients, which performs … Read more
Hello everyone! Today, we are going to discuss a very practical topic—how to use the MIPI interface on Zhi Duo Jing FPGA. Whether it’s for camera image acquisition or display control, MIPI is a very common interface standard. Mastering it will greatly enhance your video project development efficiency! The Zhi Duo Jing FPGA supports the … Read more
Hello everyone! Today, we are going to discuss a very practical topic—how to use the MIPI interface on iSilicon FPGAs. Whether it’s for camera image acquisition or display control, MIPI is a very common interface standard. Mastering it will greatly enhance your video project development efficiency! The iSilicon FPGA supports the use of the MIPI … Read more
AI is empowering mobile phones to become personal intelligent terminals, driving growth in the mobile phone market. In the previous article, we detailed how NPUs provide energy efficiency far exceeding that of CPUs/GPUs through three major designs: fixed computation flow, tightly coupled memory, and mixed low-precision inference, making it a core upgrade direction for mobile … Read more
This year’s launch event for Intel’s 12th generation Core desktop processors (code name Alder Lake-S) was quite grand. In addition to the full-day launch event on October 28, there were actually pre-event communication meetings and demonstration activities for the media two days prior. At the Intel Architecture Day two months ago, we thoroughly analyzed the … Read more
Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us – FPGA Home, the best and largest community for pure FPGA engineers in China ISE version is 14.7 1. Clock IP Core (Clocking Wizard) Page one In the Clocking Features options box: (1) The Frequency synthesis option allows the output … Read more
I previously mentioned two bugs I encountered, both of which took half a year or even a year to resolve. Today, I will continue to share, completely breaking the illusion that I am a master, haha~~~ The problem I encountered this time can be summarized in one point: the foundation is not solid, and there … Read more