We can use a very vivid analogy to explain: imagine the inside of a chip as a city, and information (data) as vehicles traveling in this city.
Old-fashioned “city” (outdated processes, such as 28 nanometers):
Imagine a city with outdated planning:
• Wide roads but occupy a lot of land: The “main roads” (connections between transistors) in the city are wide, resulting in a large overall area (chip size).
• Heavy vehicles consume a lot of fuel: The “vehicles” (electrons) on the road require a lot of energy (voltage) to drive, and they are large and heavy, making it difficult to start and stop (high power consumption).
• Long commuting distances: Because the city is spread out, the distance from point A to point B is far, and vehicles need to travel for a long time (long signal delay).
• Conclusion: This city can accommodate a limited number of vehicles and buildings (low computing power), and because the vehicles are heavy and the distances are long, they consume a lot of fuel (high power consumption).
Modern “smart city” (advanced processes, such as 3 nanometers):
Now, imagine a top-planned future smart city:
• Microscopic precision planning: We can use more advanced “sculpting technology” (such as EUV lithography) to build extremely fine micro-roads and micro-buildings in the city. Shrinking the process from 28 nanometers to 3 nanometers means we can make transistors smaller and denser.
• Three major benefits:
1. Stronger computing power (more people can live in the same area, higher traffic efficiency)
◦ Reason: In the same chip area (city area), we can fit many more micro-transistors (micro-buildings and roads). Just like on the same piece of land, where we could only build bungalows before, now we can build skyscrapers, leading to an exponential increase in the number of residents (transistor count).
◦ Result: More transistors mean we can form more complex “computing cores” (like multi-core CPUs or more powerful NPUs), just as a city with more police stations, hospitals, and schools naturally increases its capacity to handle affairs (computing power).
2. Lower power consumption (lighter vehicles, shorter distances, more fuel-efficient)
◦ Reason A: Lower voltage/capacitance: When transistors operate, they need to charge a part called the “gate” (like starting a vehicle). As transistors shrink, the area of this “gate” that needs charging also shrinks dramatically, making the vehicles very lightweight. They can be quickly started with very little electricity (low voltage), which greatly reduces dynamic power consumption.
◦ Reason B: Shorter transmission distances: The distance between transistors becomes extremely short, significantly reducing the distance electrons (vehicles) need to travel. With shorter distances, the heat generated by resistance work (power consumption) decreases, and speeds increase.
◦ Result: For the same computational task, advanced process chips consume far less energy than outdated processes.
3. Faster speeds (extremely short commuting times)
◦ Reason: Again, because the distances have shortened, the time (delay) required for signals to travel from one end of the chip to the other has significantly decreased.
◦ Result: The chip’s clock frequency can be increased, leading to faster computation speeds.
Summary
In simple terms, the more advanced the process, the more precise technology is used to build denser, smaller, and more energy-efficient “buildings” (transistors) and “roads” (circuits) on the same size chip.
This enables chips to:
• Have stronger computing power: because the number of transistors per unit area increases explosively.
• Have lower power consumption: because the energy required to drive each micro-transistor and the losses in signal transmission have significantly decreased.
• Have faster speeds: because the signal transmission paths are extremely short.
Therefore, adopting advanced processes for edge AI chips (such as NPUs in mobile phones and smartwatches) is crucial, as it directly achieves our desired goal: to realize powerful AI computing power on devices with limited battery capacity while ensuring long battery life.
2. After fitting more chips, how to solve the heat dissipation problem?
Heat dissipation is one of the biggest challenges faced by advanced process chips, and it must be addressed through a “coordinated heat dissipation war” from the inside of the chip to the outside.
We continue to use the “city” analogy to explain how this “war” is conducted in an easy-to-understand manner:
The root of the problem: explosive energy density
In the advanced process “smart city”, there are too many “residents” (transistors) per unit area, and they are very active (high computing power). Although the energy consumption of each individual resident is low (low power consumption), when billions of residents work together, the total heat generated accumulates in a very small space, leading to extremely high “energy density”.
This is like: a stadium that can hold 100,000 people, if only 1,000 people are present, it feels cool with the windows open; but if 100,000 people fill it, even if each person emits only a little heat, the entire venue will become unbearably hot.
❄️ Solution: A “heat dissipation campaign” from the inside out
Engineers need to work together at multiple levels like city planners and firefighters:
First battle: Inside the chip – “Improving building materials and structures”
1. Use more energy-efficient “residents” (low-power design): This reduces heat generation at the source. By adopting more advanced semiconductor materials (such as FinFET, GAA transistor technology), transistors can switch more “decisively”, reducing ineffective power leakage. This is equivalent to equipping each “resident” with energy-efficient appliances, fundamentally reducing heat generation.
2. “Zoned power supply and smart lighting” (Dynamic Voltage Frequency Scaling – DVFS): Not all parts of the chip operate at full load at all times. AI chips monitor task loads in real-time, requiring full output when high performance is needed, and immediately reducing voltage and frequency (downscaling) when the task is light, just like a city’s power grid that only supplies full power during peak usage and reduces output at night. This directly reduces unnecessary heat generation.
Second battle: Packaging level – “Building efficient internal cooling systems”
Once heat is generated inside the chip, it must be conducted out as quickly as possible.
3. Introduce “materials with excellent thermal conductivity”: Traditional materials in chip packaging may have poor thermal conductivity. Now, thermal interface materials (TIM), through-silicon vias (TSV), and metals with better thermal conductivity (such as copper replacing aluminum) are used, equivalent to embedding high-speed thermal conduits in the walls of skyscrapers, allowing heat to flow unobstructed to the exterior.
Third battle: Device level – “Installing powerful air conditioning units for the city”
This is the most intuitive solution, and it is one that consumers can directly feel.
4. Vapor chambers (VC) and heat pipes: This is the most common solution in flagship smartphones. It is equivalent to attaching a “flat heat exchanger” with capillary structures and cooling liquid above the chip. The liquid absorbs heat at the hot end, evaporates, flows to the cold end to release heat, condenses, and flows back, cycling continuously. This phase change cooling is much more efficient than simple solid conduction. It can be understood as installing a “central liquid cooling system” for the chip city.
5. Graphene heat sinks: Graphene is a two-dimensional material with excellent thermal conductivity in the plane direction. Heat dissipation films made from it can quickly spread heat from one point of the chip evenly across the entire back of the phone, equivalent to laying a huge “thermal carpet” underground in the city to avoid localized overheating.
6. Metal frames and external air convection: The metal frame and back panel of the phone itself act as large heat sinks. Through careful design, the internal heat will eventually be conducted to the device’s surface, and then dissipated through heat exchange with the external air. Cooling attachments commonly found in gaming phones act as a powerful “mobile air conditioner”, directly cooling the back of the phone using semiconductor cooling plates.
Summary
Therefore, solving the heat dissipation problem of advanced processes is not reliant on a single technology, but rather a system engineering approach:
Low-power design (source heat reduction) → Efficient internal thermal conductive materials (rapid export) → Vapor chambers/heat pipes (efficient diffusion) → Metal chassis/cooling attachments (final dissipation)
It is precisely because of the continuous advancement of these layered heat dissipation technologies that we can fit hundreds of billions of transistors into a chip the size of a fingernail and allow it to continuously and stably deliver powerful AI computing power without “striking” (throttling) or damaging due to overheating. The outcome of this “heat dissipation war” directly determines the performance ceiling of the devices in our hands (end of text).