D20251024-Guotou Securities-Deep Analysis of the Electronic Industry: Edge AI Ignites a New Round of Electronic Cycle, SoC Expected to Welcome Davis Double-Click Moment.pdf20250724-Dongwu Securities-Rockchip-603893-AIoT SoC Chip Leader Embraces New Opportunities in Edge AI.pdf20250714-CMB Securities-Rockchip-603893-Domestic AIoT SoC Chip Leading Manufacturer Driven by Edge AI Applications for Growth.pdfK
Rockchip’s Business Logic Chain:
1. Business Model and Industry Positioning
1. Fabless Model
Rockchip adopts apure integrated circuit design business model, focusing solely on chip R&D, design, sales, and customer service,without owning any production lines. All processes such as wafer manufacturing, packaging, and testing are outsourced to third-party foundries. The core of this model is to maximize R&D investment ratio throughlight asset operation (R&D expense ratio over20% in the first three quarters of 2025), concentrating resources on architecture innovation and algorithm solidification, while avoiding heavy asset depreciation risks, but it requires high supply chain management capabilities.
2. Vertical Division of Labor Model
The global semiconductor industry chain’s specialized division of labor is broken down intoIC design (Fabless) → Wafer Foundry → Packaging and Testing (OSAT), three independent segments. Rockchip is at the top of the chain, delivering design results throughGDSII files and relying on foundries like TSMC for physical realization. In the first half of 2025, the company achieved revenue of2.046 billion yuan, a year-on-year increase of 63.85%, validating its high elasticity advantage.
3. Distributor-Driven, Direct Sales as Supplement
Rockchip’ssales channel strategy shows that in the first half of 2025, distributor revenue accounted for over80%. Distributors bear the costs of payment terms, inventory buffering, and technical support, helping the company quickly reach small and medium-sized customers and reduce accounts receivable risks; direct sales focus on customized collaborative development with major automotive companies like GAC and SAIC, deeply binding strategic customers but requiring acceptance of stricter pricing terms.
2. Technical Core and Architecture
4. SoC (System-on-Chip)
Rockchip’s producttechnical form refers to the integration ofCPU, GPU, NPU, memory controller, audio and video codec, I/O interfaces and other complete system functions on a single silicon chip. In the first half of 2025,revenue from smart application processor chips was 1.846 billion yuan, accounting for 90.25%, making it the absolute revenue mainstay. SoC achieves high integration through IP reuse and bus architecture, directly determining the performance ceiling and cost structure of end products.
5. ARM Architecture
Rockchip’s chips are based onlicensed underlying instruction set architecture, requiring a one-time architecture licensing fee plus royalties to ARM. Currently, it adoptsARMv8-A architecture, developing microarchitectures (such as Cortex-A76) based on this, which serves as theinfrastructure for ecological compatibility and software stack support. In 2025, the company is accelerating parallel deployment of RISC-V architecture to mitigate geopolitical risks.
6. RISC-V Architecture
Open-source instruction set architecture (ISA) that requires no licensing fees and can be modified freely. Rockchip has positioned it as astrategic backup to ARM, laying out in the IoT MCU field, with continued R&D investment in RISC-V architecture chip iterations in 2025 to avoid export control risks and achieveindependence in underlying technology, although its ecological maturity is not yet on par with ARM.
7. IP Cores/IP Licensing
Rockchip acquires third-party semiconductor intellectual property modules throughcommercial licensing, including DDR, USB, PCIe interface IPs and Arteris’s NOC bus IP. IP cores are integrated into SoC in either hard (Hard IP) or soft (Soft IP) forms, which can shorten the R&D cycle by 12-18 months, but require payment oflicensing fees plus royalties based on chip shipment volume. This is the core path forrapidly building technical capabilities under the Fabless model.
8. NPU (Neural Processing Unit)
The hardware circuit module in Rockchip’s SoC specifically designed forAI operator acceleration, with itsTOPS (Tera Operations Per Second) performance directly determining the efficiency of edge AI model operation. The flagship chip RK3588 has an NPU computing power of6 TOPS, supporting mainstream AI frameworks, which is a core differentiating factor for AIoT chips, supporting the company’s implementation of edge AI in automotive electronics, robotics, and other fields.
3. Product and Market Direction
9. AIoT (Artificial Intelligence of Things)
Rockchip’sstrategic market positioning refers to deploying AI computing power at IoT terminals to achieve local perception, decision-making, and execution. It covers three major scenarios:smart home (robot vacuum),machine vision (security cameras), andautomotive electronics (smart cockpit). In the first half of 2025, the company clearly positioned itself as an “AIoT chip supplier,” leveraging long-term strategic layout advantages to meet the demand for AI in edge applications,with the AIoT product line maintaining rapid growth.
10. Application Processor (AP)
Rockchip’score product category is high-performance SoCs aimed at specific vertical scenarios, integrating general computing and dedicated acceleration capabilities. In the first half of 2025, revenue accounted for90.25%, with a gross margin of41.42%, making it the main source of the company’s profits. AP emphasizesscenario-based PPA (Performance-Power-Area) optimization, such as the RK3588, which is architecturally optimized for 8K display and multi-channel video encoding and decoding, applied in over ten mass-produced models from GAC, SAIC, and others.
11. On-Device AI
Computing paradigm refers to completing AI inference tasks locally on the device without relying on the cloud. Rockchip achievesmodel quantization, compilation, and deployment through NPU and toolchain (RKNN), with core values inlow latency, data privacy protection, and offline availability. In 2025, the company continues to expand in key areas such as automotive electronics, industrial applications, machine vision, and various robotics, reflecting the explosive demand for edge AI.
12. Edge Computing
System-level architecture concept involves data processing at network edge nodes (such as smart gateways, NVRs) close to the data source. Rockchip’s RK3568/RK3588 chips undertake edge-side aggregation computing tasks, forming a“edge-cloud” layered computing system in collaboration with edge AI, reducing bandwidth costs and central server load. The growth in industrial applications and robotics in 2025 heavily relies on the proliferation of edge computing architecture.
4. Supply Chain and Production Capacity
13. Wafer Foundry
Rockchip delivers the designedGDSII layout files to foundries like TSMC and SMIC, which complete front-end processes such as photolithography, etching, and thin film deposition, producing wafers (Wafer) and chargingprocessing fees based on wafer count. The cost of the foundry segment accounts for60%-70% of the total chip cost, and production capacity scheduling directly determines the product launch rhythm. In 2025, the company secures capacity for flagship chips like RK3588M in the automotive sector throughprepaid deposits and other means to ensure stable delivery.
14. Process Node
Thetechnology node of wafer foundry, such as the12nm FinFET process used in Rockchip’s high-end chips. The smaller the process number, the higher the transistor density, leading to better performance and power consumption, buttape-out costs increase exponentially (the photomask cost for 12nm is about $5 million). In 2025, the company continues to invest inadvanced process R&D, requiring precise trade-offs between performance and cost.
15. Capacity Binding
Rockchip signscapacity reservation agreements with foundries, locking in future capacity shares for 6-12 months through prepaid deposits or long-term order commitments (LTA). During wafer shortages, this is acore competitive means to ensure delivery, but it occupies cash flow and carries the risk of inventory impairment during demand downturns. In 2025, amid a supply-demand imbalance in the automotive market, capacity binding becomes astrategic necessity.
5. Financial and Operational Risks
16. Customer Concentration Risk
Rockchip’sfinancial risk indicator shows that in the first half of 2025, while specific customer proportions were not disclosed, the company clearly indicated a high reliance on wafer foundries and packaging/testing factories. Historically, the sales from the top five customers accounted forover 40% of revenue, limiting bargaining power. In 2025, with the introduction of automotive electronics customers (GAC, SAIC, Zhonghong Technology), although the customer structure is optimizing, the annual price review by major automotive companies may still suppress gross margins.
17. Inventory Level
Rockchip’soperational health indicator is typically measured byinventory turnover days. In the first half of 2025, the company needs toplace orders 3-6 months in advance for stocking. If market demand is misjudged, leading to inventory buildup, it will face risks of inventory depreciation. In 2024, the inventory turnover rate improved to3.17 times, indicating improved inventory management capabilities, but in the rapidly changing AIoT market, inventory risk remains theoperational lifeline of the Fabless model.
18. Gross Margin
Core profitability indicator, calculated as (operating revenue – operating cost) / operating revenue. In Q3 2025, the gross margin for smart application processor chips was41.42%, significantly higher than the 34.2% in 2023, reflecting structural optimization brought by the ramp-up of high-end products like the RK3588 series. Gross margin is theonly financial criterion for assessing full-link efficiency, determined by product performance premiums, supply chain bargaining power, and customer structure.
Logical Relationship Chain (Latest Validation in 2025):Fabless model determines light asset form → relies onARM/RISC-V architecture andIP licensing to buildSoC → developssmart application processors for theAIoT market → strengthensedge AI andedge computing capabilities → achieves physical mass production throughwafer foundry andprocess technology → secures supply chain throughcapacity binding → primarily sells throughdistributors strategy → ultimately facescustomer concentration andinventory level risks → gross margin is theonly financial criterion for assessing full-link efficiency. In the first half of 2025, this logical chain was fully validated under the ramp-up of automotive electronics and the explosive demand for AIoT, driving revenue growth of 63.85% year-on-year and net profit growth of 190.61%.
I
Brokerage firms’ recent hype around edge AI is somewhat misleading. Essentially, there are increasingly more scenarios in life that require computational processing. For example, computational photography, computational audio, automotive applications, machine vision, facial recognition, translation, etc. Most of these computations need to be completed locally, thus raising the requirements for on-site processors. The most critical point is that many of these on-site application scenarios are transitioning from consumer electronics products, with the downstream largely controlled by Chinese companies.
SoC is essentially integrating a complete computer motherboard into a chip to adapt to various on-site applications. Selling SoC chips is fundamentally selling application solutions.Logical Essence: Achieving precise trade-offs in the triangle ofPerformance, Power, and Area for different scenarios, realizing architectural-level optimization. The most advanced SoCs are mobile chips, which have pushed the pursuit of PPA to the extreme, leaving only a few third-party manufacturers like Qualcomm and MediaTek in the mobile SoC industry. Other application fields tend to have specific focuses, such as low power consumption for long battery life, miniaturization for wearables, and high performance for automotive and machine vision. Correspondingly, the capabilities and genes of manufacturers also differ.
Performance leap! Full analysis of RK3688 parameters, AI chips become the focus, Rockchip makes a strong move!
Rockchip is part of the high-performance faction. For instance, the upcoming RK3688 is expected to match the performance of MediaTek’s next-generation flagship product, marking an important milestone in the SoC industry. It features 4 large cores and 6 small cores, utilizing the latest generation of IP from ARM that has not yet been officially released. The process is also expected to be MediaTek’s advanced process, possibly at 6nm. The first principle of the chip industry is the total lifecycle shipment volume, which is generally difficult for most people to gauge, but the support from ARM and MediaTek can serve as important references.
C
1. High-performance SoCs currently have the right timing, location, and people; the only bug is that the domestic industry has not yet truly mastered advanced processes;
2. The SoC track is still relatively crowded, but the landscape of the high-performance SoC sub-track is already quite clear, with Rockchip as the leader;
3. Rockchip currently has a PE ratio of 68, which is relatively high;
4. The performance in Q4 2025 should be good. New products are expected to launch in 2026, with estimates for automotive integration in 2027, during which favorable news should continue to be released. After the hype around AI infrastructure reaches a stage, it will spread to the AI application end.
Mark: 603893$Close == 166.09 @ 2025/11/17