In FPGA design, binary operations are one of the most fundamental and commonly used logical operations, with addition, subtraction, multiplication, and division widely applied in digital signal processing, control algorithms, and data computation scenarios. To simplify hardware implementation while accommodating signed operations, FPGAs typically use two’s complement representation for signed numbers. Using two’s complement not only unifies addition and subtraction into the same hardware structure but also simplifies the handling of signs in multiplication and division.

This article will delve into the principles and design techniques for implementing binary addition, subtraction, multiplication, and division in FPGA using two’s complement representation, along with practical examples to help you master efficient and reliable arithmetic circuit design methods.

1. Sign-Magnitude, One’s Complement, and Two’s Complement

First, let’s introduce the concepts of sign-magnitude, one’s complement, and two’s complement. For signed numbers, the highest bit represents the sign bit, where 0 indicates positive and 1 indicates negative.

The sign-magnitude, one’s complement, and two’s complement representations of positive numbers are all the same.

For negative numbers, excluding the sign bit, inverting each bit gives the one’s complement, and adding 1 to the one’s complement corresponds to the two’s complement of the negative number.

For negative numbers, if we use an n-bit binary number N (excluding the sign bit), its two’s complement can also be represented as 2^n – N. For example, the two’s complement of -1 in a 4-bit number is 1_111, which can be derived from 2^3 (n=3) – 1 (N=1) = 7 (111).

The table below shows the sign-magnitude, one’s complement, and two’s complement representations of signed binary numbers with a width of 4 bits, which you can verify.

2. Addition and Subtraction Using Two’s Complement

In FPGA design, signed numbers are typically represented using two’s complement, allowing addition and subtraction to be implemented using the same adder circuit, greatly simplifying the hardware structure.

Addition is performed by directly adding two two’s complement numbers in binary, and the result remains in two’s complement form; subtraction can be achieved by adding the two’s complement of the subtrahend to the minuend, i.e., A – B = A + (~B + 1), where ~ denotes the bitwise NOT operation.

The sign of the sum is obtained by adding the sign bits of the two addends and the carry from the most significant bit. Below are examples of binary two’s complement operations: 13 + 10, 13 – 10, -13 + 10, and -13 – 10.

3. Multiplication Using Two’s Complement

First, let’s introduce multiplication for unsigned numbers, for example, 9 * 5 = 45, which involves only shifting and addition operations.

For signed number multiplication, first, the sign bit needs to be extended, adding an additional sign bit; second, since the highest bit of the two’s complement is negative, the last partial product, compared to the previous ones, is a “negative number.” For this term, a “subtraction operation” should be used, which is known as “correction,” and subtraction can be transformed into addition. Below is a diagram illustrating -3 * (-5).

Since subtraction can also be transformed into addition, it can be represented as the following shifting and addition operations.

Here is another example of 13 * (-11) for readers to verify.

4. Division Using Two’s Complement

The division of signed binary numbers is a relatively complex process. The core idea is to first handle the sign, then the value, and finally assign the sign to the result.

Convert both the dividend (A) and the divisor (B) to their absolute values (positive form). Keep track of the final result’s sign: the sign of the result = the sign bit of A XOR the sign bit of B. Then perform the division of the two unsigned positive numbers. After the numerical calculation is complete, you will have the unsigned quotient and remainder. Based on the sign recorded in the first step, adjust the quotient (if necessary, convert it to the binary two’s complement form).

The following diagram illustrates an example of division for unsigned binary numbers, showing that binary division can be completed through several iterations of “right shifting the divisor” and “subtracting the divisor from the dividend or remainder.”

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