Xilinx FPGA Configuration Modes

Xilinx FPGA Configuration Modes

Welcome FPGA engineers to join the official WeChat technical group. This article mainly introduces the configuration modes of Xilinx FPGAs, including Master/Slave mode, Serial/SelectMAP mode, JTAG mode, etc. Among them, the 7 series only has the Logic part, and all configuration-related function pins are connected to specific banks on the FPGA side; the Zynq 7000 … Read more

Xilinx FPGA SelectIO Resources

Xilinx FPGA SelectIO Resources

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the largest and best pure FPGA engineer community in China. This article mainly introduces the I/O resources on the PL side of Xilinx FPGA, which currently includes three types: HP, HR, and HD. Different architectures and … Read more

Xilinx 7 Series FPGA PCB Design Guide (Part 5)

Xilinx 7 Series FPGA PCB Design Guide (Part 5)

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the largest and best FPGA pure engineer community in China. Introduction: Transmission lines define and control characteristic impedance along their length. However, the three-dimensional structure at their interfaces does not have easily defined or constant impedance … Read more

Xilinx FPGA Encryption Solutions

Xilinx FPGA Encryption Solutions

1. Overview Xilinx FPGAs starting from the 7 series have on-chip Advanced Encryption Standard (AES) decryption logic, providing a high level of design security. Encrypted Xilinx FPGA designs cannot be copied or reverse-engineered for other FPGAs.The Xilinx FPGA responsible for encryption uses an AES system consisting of software-based bitstream encryption and on-chip bitstream decryption, with … Read more

What Are ASIC and FPGA?

What Are ASIC and FPGA?

In the previous article, Xiaozhao introduced CPU and GPU. Today, I will continue to introduce two other main characters in the field of computing chips—ASIC and FPGA.█ ASIC (Application Specific Integrated Circuit) As mentioned earlier, GPUs have strong parallel computing capabilities, but they also have disadvantages, such as high power consumption, large size, and high … Read more

FPGA Fixed-Point Decimal Calculation (Verilog Version) Part 3

FPGA Fixed-Point Decimal Calculation (Verilog Version) Part 3

Fixed-point decimal division is much more complex than addition and multiplication, but the basic idea of the algorithm is still quite simple. Similar to integer division, the core idea of the algorithm is to convert the division operation into shift and subtraction operations. From a practical implementation perspective, there are generally two methods: One is … Read more

Introduction to Prospects of Analog, RF, Devices, FPGA, Digital Direction, and EDA

Introduction to Prospects of Analog, RF, Devices, FPGA, Digital Direction, and EDA

Click the blue text to follow us 01 Analog and RF 01 What is Analog Analog Signals: In timing and amplifiers, all signals in the continuous natural domain are analog signals; while digital signals are artificially defined and only appear in computers. Analog Functions: ① amplify ② filter ③ transfer Classification of Analog: Power supply, … Read more

Empowering Users and Industries with FPGA Chip Applications

Empowering Users and Industries with FPGA Chip Applications

In the past two years, opportunities for industry development have emerged from chip design to upstream materials and equipment, and down to downstream distributors. Among them, KeTong Technology is one of the domestic electronic component distributors and has performed exceptionally in the market. The company closely collaborates with several leading chip manufacturers globally, covering major … Read more

Design of High-Speed Oscilloscope Equivalent Sampling System Based on PLL

Design of High-Speed Oscilloscope Equivalent Sampling System Based on PLL

Zha Tianyi1, Chen Shengqi2, Ge Junyao3 (1. Changshu High School, Jiangsu Suzhou 215500; 2. Department of Electrical Engineering and Applied Electronic Technology, Tsinghua University, Beijing 100084; 3. School of Communication and Information Engineering, Nanjing University of Posts and Telecommunications, Jiangsu Nanjing 210023) Abstract: This paper adopts the fractional-N phase-locked loop (PLL) chip ADF4351 as the … Read more

Design of A Combined Function Signal Generator and Oscilloscope

After several days of effort, we have basically achieved the above requirements in this design, and proposed improvements in some functional aspects to make the system design more complete. In this design, we use an FPGA as the main controller, but due to time and equipment constraints, this design also has shortcomings, such as the … Read more