ZYNQ: From Abandonment to Entry (Part 8) – Interaction Between PS and PL

ZYNQ: From Abandonment to Entry (Part 8) - Interaction Between PS and PL

Previous articles mainly focused on the Processing System (PS) of the Zynq SoC, including: Using MIO and EMIO The interrupt structure of Zynq SoC Zynq private timers and watchdogs The triple timer counter (TTC) of Zynq SoC However, from a design perspective, the truly exciting aspect of the Zynq SoC is creating applications that utilize … Read more

AXI Hardware Accelerator for McEliece on FPGA Embedded Systems

AXI Hardware Accelerator for McEliece on FPGA Embedded Systems

01Introduction This academic sharing is based on the research work published by Enrique Cantó-Navarro and Mariano López-García in IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING in 2025. Paper Title:AXI Hardware Accelerator for McEliece on FPGA Embedded Systems Authors:Enrique Cantó-Navarro, Mariano López-García Source:《IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING》,DOI:10.1109/TDSC.2024.3445181 Value Rating: Method Innovation ★★★★☆ Engineering Value … Read more

Xilinx PCIe Data Interaction Application (XDMA)

Xilinx PCIe Data Interaction Application (XDMA)

“Based on the XCKU040 development board, this article shares the functionality of data communication and processing between a host computer and FPGA via PCIe. Feel free to communicate; leave a message/private message to obtain the relevant source code.。” FPGA PCIe is commonly used in applications such as data acquisition, communication, and acceleration. This article takes … Read more