Mr. Big Cat says: Translation compilation of Chapter 13 from the book RFSoC-Book, detailed introduction of this book can be found in the first article of this series. “An open-source masterpiece, ‘Software Defined Radio Based on Zynq UltraScale+ RFSoC’” Mr. Big Cat, WeChat public account: Mr. Big Cat’s Little Bookcase, an open-source masterpiece, ‘Software Defined … Read more
If you often browse GitHub looking for keywords like FPGA, AXI, Ethernet, and DMA, you may have come across a name: fpgadeveloper. This is an open-source account maintained by Jeff Johnson, focusing on designs related to FPGA drivers, AXI bus, PCIe, and FMC expansion. Although the repository is not extensive, it is highly valuable…
Click the “blue words” above to follow us! Some patients with progressive supranuclear palsy (PSP) complain that their eyes “cannot be opened.” This phenomenon is often caused by blepharospasm and apraxia of eyelid opening. Today, we will share the clinical features, pathogenesis, and treatment methods of these two symptoms. 01 Clinical Features Blepharospasm (BSP) and … Read more
In the debugging of JESD204C on the board, I directly skipped the process of looking at its examples, as the content of the example block design is quite extensive and seems cumbersome. Since I already have experience debugging JESD204B, I simply followed the same approach for JESD204C, connecting some key lines to create a top-level … Read more
Why is it called “Xilinx HLS”? It is said that Altera’s HLS is somewhat different. 1 HLS Design The names of Xilinx’s HLS tools vary; I recall “Vivado HLS” and “Vitis HLS”. The version of the tool I used is 2024.2, and this version of the HLS tool is called “Vitis”. Vitis 2024.2 is a … Read more
Previous articles mainly focused on the Processing System (PS) of the Zynq SoC, including: Using MIO and EMIO The interrupt structure of Zynq SoC Zynq private timers and watchdogs The triple timer counter (TTC) of Zynq SoC However, from a design perspective, the truly exciting aspect of the Zynq SoC is creating applications that utilize … Read more
01Introduction This academic sharing is based on the research work published by Enrique Cantó-Navarro and Mariano López-García in IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING in 2025. Paper Title：AXI Hardware Accelerator for McEliece on FPGA Embedded Systems Authors:Enrique Cantó-Navarro, Mariano López-García Source:《IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING》，DOI：10.1109/TDSC.2024.3445181 Value Rating: Method Innovation ★★★★☆ Engineering Value … Read more
“Based on the XCKU040 development board, this article shares the functionality of data communication and processing between a host computer and FPGA via PCIe. Feel free to communicate; leave a message/private message to obtain the relevant source code.。” FPGA PCIe is commonly used in applications such as data acquisition, communication, and acceleration. This article takes … Read more