The CPO Era: Will the Value of PCBs from Shenghong Technology and Huidian Co., Ltd. Increase?

The CPO Era: Will the Value of PCBs from Shenghong Technology and Huidian Co., Ltd. Increase?

Recently, there has been a saying online that

physics determines dimensionality reduction… In the CPO era, signals no longer travel through PCBs, and PCBs degrade to merely providing power and mechanical support as physical carriers.

This saying is quite popular, so today let’s chat about this topic.

The main reason is that people believe PCBs lack technical content, the ceiling is too low, and there are many manufacturers, making it easy to produce in large quantities.

First

1. The Iron Law of Physics: Current Does Not Disappear (Power Delivery is King)

This is the first major support for the increase in PCB value in the CPO era, and it is also the easiest to overlook.

Even if signals are transmitted via light (CPO), electricity still needs to travel through copper.

As GPU power consumption approaches 1000W or even 1200W, current may exceed 1000A.

  • Current Situation: The power consumption of NVIDIA H100/B200 is between 700W – 1000W, with core voltage (Vcore) around 0.6V – 0.8V. This means the current has reached 1000A – 1200A.

  • CPO Era Evolution:

    • The introduction of CPO aims to further enhance bandwidth and computing power, with chip power consumption likely to exceed 1500W+.
    • Current Explosion: According to projections, current will rise to 1800A or even 2000A levels.
  • Stringent Requirements for PCBs (Value Increment Points):

  1. Ultra-Low Impedance Design (IR Drop): To prevent energy loss and heating during PCB transmission, resistance must be significantly reduced.

  2. Super Heavy Copper Technology: The standard copper thickness for PCBs is 1oz, while AI boards may require 3oz – 6oz of inner layer copper thickness. Etching such thick copper while ensuring precision is a highly challenging process, with low yield and high cost.

  3. Layer Count: To distribute 2000A of current, a large number of power planes and ground planes must be paralleled. This directly locks in a high layer count requirement of 26 layers – 30 layers+, which will not decrease due to signals being transmitted via light.

First Conclusion: Regardless of how chips change or how light is transmitted, as long as there is a need for “electricity” in the physical world, and as long as chips require power, PCBs must carry current, distribute power, and connect peripherals. PCBs must be a “superconducting highway”.

The higher the current, the more expensive the PCB.

2. Density: PCBs are Becoming “Carrier Boards” (The HDI Evolution)

CPO brings the optical engine next to the GPU substrate, which imposes almost extreme interconnection density requirements on the host PCB.

  • Signal Escape (Fan-out) Challenges:

    • Although long-distance signals are transmitted via light, the interconnection density between the GPU and memory (HBM), the GPU and CPO module, and the GPU and power management chip (DrMOS) is increasing exponentially.
  • Process Upgrades (Value Increment Points):

  1. From Through Hole to Any-layer HDI: Traditional through holes are no longer sufficient; it is necessary to use high-level HDI (High-Density Interconnect) or even Any-layer (Any-layer Interconnect) technology.

  2. Microvia Technology: It is necessary to create tens of thousands of micro-level laser blind holes on the board.

  3. Value Leap: The price of a 4-level HDI board is usually 3-4 times that of a through-hole board with the same layer count. If it evolves to SLP (substrate-like PCB) technology, the price will increase exponentially.

Second Conclusion: In the CPO era, PCBs are no longer just “boards”; structurally, they resemble a large “chip packaging substrate”.

Process complexity has replaced material costs as the core of premium pricing.

3. Warpage and Heat Dissipation Challenges

The CPO structure is extremely fragile. Several fibers thinner than a hair are directly inserted next to the chip, requiring high stability in the physical environment.

  • Warpage Control:
    • The alignment precision of the optical path is at the micron level. If the PCB warps by even 0.1% during reflow soldering, the optical path will fail to couple, resulting in the scrapping of CPO modules worth tens of thousands of dollars.

    • Value Increment Points: Special high Tg (glass transition temperature) materials and low CTE (coefficient of thermal expansion) resins must be used, and extremely precise stress control must be performed during lamination. This is a unique skill of top manufacturers.

  • Complexity of Liquid Cooling Integration:
    • Liquid cooling (Cold Plate) is almost mandatory in the CPO era. PCBs must be designed with extremely complex avoidance structures, even embedding metal blocks (Coins) to assist with heat dissipation.

Third Conclusion: PCBs have become precision structural components. The premium paid for the criterion of “not warping” is sufficient to support the prices of high-end PCBs.

4. Dialectical Perspective: What Value Will Decrease?

For the sake of rigor, we must admit that CPO will indeed reduce some of the value of PCBs, mainly:

  • Usage of Ultra-low Loss Materials May Decrease:
    • Since signals no longer need to travel 30-50 cm on the PCB to connect ports (this part is transmitted via light), the board may not require the most expensive M7/M8/M9 grade materials throughout.

    • However: To accommodate high layer counts and warpage resistance, the requirements for the structural strength and insulation performance of materials have actually increased. Therefore, it is “the unit price of materials may slightly decrease, but the processing cost of the board skyrockets”.

5. The Ultimate Calculation: Net Change in Value

We can establish a simplified value model:

TotalValueMaterialCostUsageAmountProcessingCostComplexityFactorYieldPremium

In the CPO era:

  1. Material Cost: Remains stable or slightly decreases (M9 usage decreases, but high Tg materials increase).
  2. Processing Cost:Skyrockets (heavy copper + high-level HDI + microvia + back drilling).
  3. Yield Premium:Skyrockets (because once damaged, the chips on top are more expensive to compensate).

Ultimately:

In the CPO era, the total value per board of AI PCBs will maintain an upward trend.

However, this “value” is structural— manufacturers that rely solely on “selling copper-clad board area” will see their value wiped out, while leading manufacturers that master “high-level HDI + heavy copper energy processes” (such as Huidian and Shenghong) will enjoy higher gross profit barriers.

A word for my friends: Don’t just think that “light” is high-tech and “boards” are low-end products. Under the scorching heat of 1000A current, being able to make a 30-layer board that does not warp, does not short-circuit, and does not distort signals is, in itself, a top-level material science and precision manufacturing art.

Mingyuan @ Shenzhen 2025.11.28

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