As the saying goes, failure is the mother of success. However, in reality, it is often true that success is the mother of success.
Chip design is a “high investment, high risk, high return“ industry. Firstly, the development cycle of chip design is often long. Even for the simplest LNA or switch, from project initiation to circuit design, layout, and packaging, it usually takes at least 1-2 months. The tape-out process takes about 2 months, and with bare die testing and package testing, half a year can easily pass. For complex chips, which involve different processes and cover RF, digital, and analog circuits, a complete development cycle can take one to two years. Moreover, once the tape-out is completed, the chip cannot be modified. If the tape-out fails, it often means that hundreds of thousands, millions, or even tens of millions of dollars are wasted. More importantly, according to Moore’s Law: the number of transistors that can be accommodated on an integrated circuit doubles approximately every 18 to 24 months; in other words, the performance of processors doubles roughly every two years while the price drops to half of what it was. Therefore, in the chip industry, time is the most precious resource. Once the product window is missed, the difficulty of entering the market increases exponentially.
Based on the above, we can understand that in chip design, the cost of trial and error is enormous and can even determine the survival of a company. Therefore, chip design should strive to follow the principle that success is the mother of success, whether it is currently favoring chip design engineers with tape-out experience, especially those with successful experiences, or inheriting and reusing existing successful modules/IP, or using previously validated chips/package design simulation tools and methods, all in an effort to leverage existing successes to minimize the probability of failure.
There are countless paths to failure. Trial and error is endless. For example, in order to solve the problem of WiFi FEM burning the PA, I conducted numerous experiments: adding limiting circuits at the input, adding resistors to the VCC terminal to reduce voltage swing, increasing ballast resistance at the base of the BJT, increasing negative feedback resistance at the emitter, utilizing the voltage clamping effect of ESD devices at the output, etc. These methods can solve the problem under certain conditions, but none can perfectly resolve the issue (they all have some impact on performance, or under certain extreme conditions, the device may still burn out). Time and again, my attempts resulted in failures. Eventually, it was a friend’s successful experience that enlightened me, but time was of the essence. Although these failures allowed me to grow, they caused the company to miss the best development opportunity.
This experience of failure once left me depressed, to the point that later in my resignation letter, I had to sadly note: In nearly ten years, I have walked hand in hand with the company. Looking back, I am filled with mixed feelings. I feel ashamed of the value I created for the company, which is merely a little; I feel I have let down the company’s nurturing, failing to achieve anything; I am saddened by the countless days and nights of effort, yet my expected dreams drift further away. Throughout this journey, I can only be true to my diligent work.
The path to success is often replicable. For example, how to set up EM simulation to make the simulation results closer to actual measurements, under what conditions to choose between EM and FEM simulations, and what performance can be achieved with different processes. These are all based on so-called experience, which can also be termed successful design, to be obtained. Once this successful design experience is clarified, as long as the designer understands the boundary conditions, these successful methods can be reused.
Chip design is like this, and chip entrepreneurship is even more so: success is the mother of success. I have always believed that the first key point of chip entrepreneurship is to create products for profit. Many failed chip startups, in my opinion, have the biggest failure reason that they are constantly trial and error, following the path of project-based work. At the beginning of chip entrepreneurship, the goal is to launch a successful product at the lowest cost. On a smaller scale, this can be used for financing and maintaining the company’s subsequent operations; on a larger scale, if this successful product can continuously create value, it can allow the company to become self-sustaining and operate successfully. How to launch a successful product at the lowest cost must be rooted in the successful genes of the entrepreneur. If a successful product cannot be launched quickly, I believe the timing for this entrepreneurship is not right; it is often just a money-burning bubble. If the launched product cannot create value, it indicates that the direction of the entrepreneurship is wrong and should be corrected in a timely manner.