The boot process of an SOC chip is a meticulous relay process that ensures the hardware transitions from a disordered state upon power-up to an orderly state capable of running an operating system. Below, we will detail the specific tasks at each stage.
⚙️ Power-On Reset
When power is applied, the SOC chip does not immediately start working. The reset circuit resets all registers and memory to a known initial state, akin to athletes lining up at the starting line before the starting gun fires. This stage is referred to as the power-on reset.
During this period, the SOC will complete several key preparatory tasks:
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Locking the Boot Mode: The chip will determine from which storage device (such as eMMC, SD card, SPI Flash, etc.) to load subsequent code based on the level state of the external Boot Mode Pin. This configuration will be latched when the POR is released, ensuring clarity in the boot path.
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Establishing the Basic Operating Environment: The chip will confirm the stability of the clock signal (PLL), start necessary peripheral clocks, and release reset signals for key modules. Some complex SOCs may also perform power-on self-tests and configure internal modules using data from one-time programmable memory.
📜 BootROM: The Chip’s