Introduction and Simulation of Xilinx FFT IP

Introduction and Simulation of Xilinx FFT IP

1 Introduction to Xilinx FFT IP The Xilinx Fast Fourier Transform (FFT IP) core implements the Cooley-Tukey FFT algorithm, which is an efficient method for computing the Discrete Fourier Transform (DFT). 1) Forward and inverse complex FFT, with configurable runtime. 2) Transform size N = 2m, m = 3 – 16 3) Data sampling precision … Read more

Xilinx Unveils Software-Programmable Chip Design for Data Centers: Introducing the Adaptive Compute Acceleration Platform

Xilinx Unveils Software-Programmable Chip Design for Data Centers: Introducing the Adaptive Compute Acceleration Platform

According to ZDNet Source: ZDNet Semiconductor company Xilinx has recently unveiled its software-programmable chip design for data centers, which Xilinx claims is part of a new category of computing. The software-programmable chip design for data centers is named the Adaptive Compute Acceleration Platform (ACAP). Xilinx states that ACAP will make highly programmable data center servers … Read more

Dynamic Switching of Filter Coefficients in Xilinx FIR Compiler IP (Part 1)

Dynamic Switching of Filter Coefficients in Xilinx FIR Compiler IP (Part 1)

In wireless communication systems, certain application scenarios may require changing the bandwidth of filters. Recently, my project had a requirement for an online change of filter bandwidth. So how can we implement the online switching of filter bandwidth? In fact, Xilinx’s FIR Compiler IP has this capability. Let’s follow along to see how to set … Read more

Xilinx Common IP Core Series | Design and Implementation of a Signal Generator Based on DDS

Xilinx Common IP Core Series | Design and Implementation of a Signal Generator Based on DDS

「Xilinx Common IP Core Series」 Design and Implementation of a Signal Generator Based on DDS (Includes Verilog Code + Simulation Waveform) In fields such as communications, radar, and test instruments, the signal generator is one of the most fundamental and important modules. Whether for system validation or algorithm experimentation, a stable and flexible waveform source … Read more

Accelerating Development to Mass Production of SOM Edge AI Products

Accelerating Development to Mass Production of SOM Edge AI Products

According to a report by Electronic Enthusiasts (by Cheng Wenzhi), the product development cycle is often quite short. Therefore, in China, both solution providers and terminal manufacturers prefer highly integrated chips, which speed up the development of new products.System on Module (SOM) is a highly integrated product. It is actually a miniaturized embedded board, about … Read more

Understanding JTAG Protection with TVS in Xilinx FPGA

Understanding JTAG Protection with TVS in Xilinx FPGA

Exploring the JTAG interface of the 7-series Xilinx FPGA and Zener diode protection When I was selecting the 7-series Xilinx FPGA for a new PCB design, I was unsure about the design of the JTAG interface. To find a reliable reference, I reviewed several schematic diagrams of Xilinx evaluation boards, among which the schematic of … Read more

Summary of PCIE Hardware Design Pitfalls Based on XILINX FPGA

Summary of PCIE Hardware Design Pitfalls Based on XILINX FPGA

Welcome FPGA engineers to join the official WeChat technical group. Clickthe blue textto follow us at FPGA Home – the largest and best FPGA engineering community in China. With the continuous development of FPGAs, the number of built-in PCIE hard cores is increasing. This article introduces how to allocate the corresponding hardware pins using ZU11EG … Read more

Xilinx AI SDK User Guide Released, Download Now!

Xilinx AI SDK User Guide Released, Download Now!

Introduction Xilinx AI SDK is a set of high-level libraries for the Deep Neural Network Development Kit (DNNDK) and Deep Learning Processing Unit (DPU). By integrating a large number of efficient and high-quality neural networks, Xilinx AI SDK provides an easy-to-use unified interface. This simplifies the use of deep learning neural networks, even for users … Read more