As the demand for battery life and energy efficiency in electronic devices continues to rise, low power design has become a critical aspect of chip design. The low power design strategies in DFT (Design For Testability) aim to reduce power consumption during both the testing phase and normal operation while ensuring chip test quality and … Read more
Author: Electronic Engineer Alliance Source: Power Network Sphere Number “A Comprehensive Breakdown of Low Power Design in Portable Product Development” Introduction The low power design of portable products is akin to how our parents managed their finances, where every penny must be meticulously accounted for to ensure that every expenditure is justified. Similarly, every mAh … Read more
Embassy is a next-generation framework for embedded applications that leverages the Rust programming language and its powerful asynchronous features to help developers build safer, more efficient, and energy-saving embedded software. The Advantages of Rust The Rust language is renowned for its high performance, memory safety, and extremely low runtime overhead. It has no runtime, garbage … Read more
The development of surveillance cameras resembles a splendid epic of technological iteration, gradually transitioning from the early era of analog devices to the new era of digital network cameras, and now to the widespread application of low power cameras. Each step of this evolution closely follows the solid pace of technological advancement. In the era … Read more
Reported by Electronic Enthusiasts (Author: Li Wanwan)Low power design for edge AI chips is crucial for their deployment in resource-constrained scenarios such as mobile devices and IoT terminals. In power-sensitive applications like IoT, wearables, and smart homes, low power design directly determines the device’s battery life, deployment costs, and user experience. Why do edge AI … Read more
In low power designs with multiple power domains, there are many interactive signals between different power domains. If one power domain is powered off, the signals output from that power domain to another power domain that is still powered on need to be isolated. The reason is that the signals from the powered-off power domain … Read more
After years of low-power hardware design (the hardware and software design in the company are separate, and I have always worked on hardware, often facing the challenges of low-power production incidents), one common issue is that the IO configuration is not set correctly before the microcontroller enters sleep mode. The main problems with the product … Read more
Industrial automation equipment is usually not associated with “low power consumption”; however, in special scenarios such as remote monitoring stations and mobile devices, enabling the S7-1200 to enter “energy-saving mode” becomes necessary. This is akin to modifying a family sedan into an off-road vehicle, requiring a series of professional modifications, but it is absolutely feasible. … Read more
Continuing from the previous article, a typical low power design in digital chips is the addition of a clock gate. Another method is through parallel and pipelining techniques. Parallel and Pipelining The prominent advantage of hardware description languages is the parallelism in instruction execution. Multiple statements can process several signal data in parallel within the … Read more
