Parametric Structure Design for SPI in FPGA

Parametric Structure Design for SPI in FPGA

Hello, hero! Welcome to the FPGA technology world. The world is vast, and meeting is fate. You can follow the FPGA technology world to get other interesting resources in the “Adventuring” and “Chivalry” sections, or have a drink and chat together. Today, I bring you the parametric structure design for SPI in FPGA. Without further … Read more

Why Add 22 or 33 Ohm Resistors to SPI Signal Outputs?

Why Add 22 or 33 Ohm Resistors to SPI Signal Outputs?

For more experience sharing, follow RF Engineer When a microcontroller or FPGA sends SPI control signals to a phase-locked loop chip, it often requires a series connection of a 22 ohm or 33 ohm resistor. What is the reason for this? Impedance discontinuities can cause electromagnetic wave reflections, which in turn lead to signal distortion. … Read more

Innovative IoT-Based Remote Music Teaching Platform

Innovative IoT-Based Remote Music Teaching Platform

Attention! Today, we present to youHarbin Institute of Technology the Mr.Piano project by the Hit Elites team See how traditional instruments combine with IoT What breakthroughs and changes can this bring to instrument teaching? Are you preparing to participate in the upcoming TI Cup National College Student IoT Design Competition? Do you want to stand … Read more

Differences Between MCU, DSP, and FPGA

Differences Between MCU, DSP, and FPGA

MCU (Microcontroller Unit), DSP (Digital Signal Processor), and FPGA (Field-Programmable Gate Array) are three common types of processors in embedded systems, and they have the following main differences: 1. Purpose MCU is a microcomputer that integrates basic components such as a Central Processing Unit (CPU), memory, input/output interfaces, and timers. It is typically used in … Read more

Model Design and Analysis Simulation for Side-Channel Attacks

Model Design and Analysis Simulation for Side-Channel Attacks

✖ In 2024, Huawei continues to sponsor the China Graduate Innovation Competition, providing a total of nine corporate competition topics in the fields of RF, digital, analog, and EDA algorithms for participating teams to choose from. This year’s Huawei competition topic in the digital direction is: Model design and analysis simulation evaluation of side-channel attacks/fault … Read more

The Ultimate Tool for Debugging Hardware Bugs – New Logic Analyzer

The Ultimate Tool for Debugging Hardware Bugs - New Logic Analyzer

Background The most commonly used tool in the development of electronic products is the oscilloscope. However, with the advancement of microprocessors such as ARM, X86, MIPS architectures, GPUs, deep learning processors, and the rapid growth of smart hardware, various logical bugs in hardware are frequently encountered. When issues arise with various interfaces of SoC (System … Read more

Signal Tap Logic Analyzer User Guide

Signal Tap Logic Analyzer User Guide

Greetings, hero! Welcome to the FPGA technology world. The world is vast, and meeting you is fate. You can follow the FPGA technology community to get other interesting resources in the “Adventuring” and “Heroic Deeds” sections, or just chat over drinks. This series will bring systematic learning of FPGA, starting from the most basic digital … Read more

Disassembling The Popular 100M Logic Analyzer

Disassembling The Popular 100M Logic Analyzer

This article comes from the disassembly activity of the Breadboard Community! Rich rewards! (Two DJI drones, two oscilloscopes, etc.)! Electronic engineers hurry up and participate!👇 I have an older 100M logic analyzer that I bought a while ago. Its parameters were quite high at that time, with sampling rates of 100/50/32/16MHz for 3/6/9/16 channels, using … Read more

How to Debug FPGA Using Internal Logic Analyzers?

How to Debug FPGA Using Internal Logic Analyzers?

1 Reasons Driving Change in FPGA Debugging Technology The reprogramming capability of FPGAs is a key advantage in the functional debugging of hardware designs. In the early days of using CPLDs and FPGAs, when a design was found to be malfunctioning, engineers would use the “debug hook” method. They would route the internal signals of … Read more

Understanding NOR Flash Memory Structure and Operations

Understanding NOR Flash Memory Structure and Operations

Welcome FPGA engineers to join the official WeChat technical group. This article mainly introduces the structure, external interfaces, and operations of NOR Flash. In NOR Flash, the ‘N’ stands for NOT, meaning that when there is a charge in the Floating Gate, it reads ‘0’, and when there is no charge, it reads ‘1’. This … Read more